Make the compiler threadsafe
The compiler inherited a simple memory management scheme that
involved malloc'ng a clump of memory, allocating out of that
clump for each unit of compilation, and then resetting after
the compilation was complete. Simple & fast, but built with the
expectation of a single compiler worker thread.
This change moves the memory allocation arena into the
CompilationUnit structure, and makes it private for each method
compilation. Unlike the old scheme, allocated memory is returned
to the system following completion (whereas before it was reused
for the next compilation).
As of this CL, each compilation is completely independent.
The changes involved were mostly mechanical to pass around the
cUnit pointer to anything which might need to allocate, but the
accretion of crud has moved me much closer to the point that
all of this stuff gets ripped out and replaced.
Change-Id: I19dda0a7fb5aa228f6baee7ae5293fdd174c8337
diff --git a/src/compiler/codegen/arm/ArchFactory.cc b/src/compiler/codegen/arm/ArchFactory.cc
index 484a22d..d700e48 100644
--- a/src/compiler/codegen/arm/ArchFactory.cc
+++ b/src/compiler/codegen/arm/ArchFactory.cc
@@ -56,20 +56,20 @@
STATIC ArmLIR* genCheck(CompilationUnit* cUnit, ArmConditionCode cCode,
MIR* mir, ArmThrowKind kind)
{
- ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* tgt = (ArmLIR*)oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
tgt->opcode = kArmPseudoThrowTarget;
tgt->operands[0] = kind;
tgt->operands[1] = mir ? mir->offset : 0;
ArmLIR* branch = genConditionalBranch(cUnit, cCode, tgt);
// Remember branch target - will process later
- oatInsertGrowableList(&cUnit->throwLaunchpads, (intptr_t)tgt);
+ oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, (intptr_t)tgt);
return branch;
}
STATIC ArmLIR* genImmedCheck(CompilationUnit* cUnit, ArmConditionCode cCode,
int reg, int immVal, MIR* mir, ArmThrowKind kind)
{
- ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* tgt = (ArmLIR*)oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
tgt->opcode = kArmPseudoThrowTarget;
tgt->operands[0] = kind;
tgt->operands[1] = mir->offset;
@@ -81,7 +81,7 @@
branch->generic.target = (LIR*)tgt;
}
// Remember branch target - will process later
- oatInsertGrowableList(&cUnit->throwLaunchpads, (intptr_t)tgt);
+ oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, (intptr_t)tgt);
return branch;
}
@@ -100,7 +100,7 @@
STATIC TGT_LIR* genRegRegCheck(CompilationUnit* cUnit, ArmConditionCode cCode,
int reg1, int reg2, MIR* mir, ArmThrowKind kind)
{
- ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* tgt = (ArmLIR*)oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
tgt->opcode = kArmPseudoThrowTarget;
tgt->operands[0] = kind;
tgt->operands[1] = mir ? mir->offset : 0;
@@ -109,7 +109,7 @@
opRegReg(cUnit, kOpCmp, reg1, reg2);
ArmLIR* branch = genConditionalBranch(cUnit, cCode, tgt);
// Remember branch target - will process later
- oatInsertGrowableList(&cUnit->throwLaunchpads, (intptr_t)tgt);
+ oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, (intptr_t)tgt);
return branch;
}
diff --git a/src/compiler/codegen/arm/ArmLIR.h b/src/compiler/codegen/arm/ArmLIR.h
index 3c5daad..bc536f9 100644
--- a/src/compiler/codegen/arm/ArmLIR.h
+++ b/src/compiler/codegen/arm/ArmLIR.h
@@ -822,7 +822,7 @@
kMaxHoistDistance,
} ArmTargetOptHints;
-extern ArmEncodingMap EncodingMap[kArmLast];
+extern const ArmEncodingMap EncodingMap[kArmLast];
/*
* Each instance of this struct holds a pseudo or real LIR instruction:
diff --git a/src/compiler/codegen/arm/ArmRallocUtil.cc b/src/compiler/codegen/arm/ArmRallocUtil.cc
index d540007..1986b0f 100644
--- a/src/compiler/codegen/arm/ArmRallocUtil.cc
+++ b/src/compiler/codegen/arm/ArmRallocUtil.cc
@@ -132,9 +132,9 @@
* reg.
*/
RefCounts *coreRegs = (RefCounts *)
- oatNew(sizeof(RefCounts) * numRegs, true, kAllocRegAlloc);
+ oatNew(cUnit, sizeof(RefCounts) * numRegs, true, kAllocRegAlloc);
RefCounts *fpRegs = (RefCounts *)
- oatNew(sizeof(RefCounts) * numRegs, true, kAllocRegAlloc);
+ oatNew(cUnit, sizeof(RefCounts) * numRegs, true, kAllocRegAlloc);
for (int i = 0; i < numRegs; i++) {
coreRegs[i].sReg = fpRegs[i].sReg = i;
}
diff --git a/src/compiler/codegen/arm/Assemble.cc b/src/compiler/codegen/arm/Assemble.cc
index f270631..2990631 100644
--- a/src/compiler/codegen/arm/Assemble.cc
+++ b/src/compiler/codegen/arm/Assemble.cc
@@ -80,7 +80,7 @@
* [!] escape. To insert "!", use "!!"
*/
/* NOTE: must be kept in sync with enum ArmOpcode from ArmLIR.h */
-ArmEncodingMap EncodingMap[kArmLast] = {
+const ArmEncodingMap EncodingMap[kArmLast] = {
ENCODING_MAP(kArm16BitData, 0x0000,
kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP, "data", "0x!0h(!0d)", 1),
@@ -1131,8 +1131,8 @@
lir->operands[0] : rLR;
// Add new Adr to generate the address
- ArmLIR *newAdr =
- (ArmLIR *)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR *newAdr = (ArmLIR *)oatNew(cUnit, sizeof(ArmLIR),
+ true, kAllocLIR);
newAdr->generic.dalvikOffset = lir->generic.dalvikOffset;
newAdr->generic.target = lir->generic.target;
newAdr->opcode = kThumb2Adr;
@@ -1165,8 +1165,8 @@
int delta = target - pc;
if (delta > 126 || delta < 0) {
/* Convert to cmp rx,#0 / b[eq/ne] tgt pair */
- ArmLIR *newInst =
- (ArmLIR *)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR *newInst = (ArmLIR *)oatNew(cUnit, sizeof(ArmLIR),
+ true, kAllocLIR);
/* Make new branch instruction and insert after */
newInst->generic.dalvikOffset = lir->generic.dalvikOffset;
newInst->opcode = kThumbBCond;
@@ -1290,7 +1290,8 @@
} else {
// convert to ldimm16l, ldimm16h, add tgt, pc, operands[0]
ArmLIR *newMov16L =
- (ArmLIR *)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ (ArmLIR *)oatNew(cUnit, sizeof(ArmLIR), true,
+ kAllocLIR);
newMov16L->generic.dalvikOffset = lir->generic.dalvikOffset;
newMov16L->generic.target = lir->generic.target;
newMov16L->opcode = kThumb2MovImm16LST;
@@ -1300,7 +1301,8 @@
oatSetupResourceMasks(newMov16L);
oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16L);
ArmLIR *newMov16H =
- (ArmLIR *)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ (ArmLIR *)oatNew(cUnit, sizeof(ArmLIR), true,
+ kAllocLIR);
newMov16H->generic.dalvikOffset = lir->generic.dalvikOffset;
newMov16H->generic.target = lir->generic.target;
newMov16H->opcode = kThumb2MovImm16HST;
@@ -1345,7 +1347,7 @@
if (res != kSuccess) {
continue;
}
- ArmEncodingMap *encoder = &EncodingMap[lir->opcode];
+ const ArmEncodingMap *encoder = &EncodingMap[lir->opcode];
u4 bits = encoder->skeleton;
int i;
for (i = 0; i < 4; i++) {
diff --git a/src/compiler/codegen/arm/CodegenCommon.cc b/src/compiler/codegen/arm/CodegenCommon.cc
index c99573f..fb6ad30 100644
--- a/src/compiler/codegen/arm/CodegenCommon.cc
+++ b/src/compiler/codegen/arm/CodegenCommon.cc
@@ -245,7 +245,7 @@
*/
STATIC ArmLIR* newLIR0(CompilationUnit* cUnit, ArmOpcode opcode)
{
- ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* insn = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & NO_OPERAND));
insn->opcode = opcode;
setupResourceMasks(insn);
@@ -257,7 +257,7 @@
STATIC ArmLIR* newLIR1(CompilationUnit* cUnit, ArmOpcode opcode,
int dest)
{
- ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* insn = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_UNARY_OP));
insn->opcode = opcode;
insn->operands[0] = dest;
@@ -270,7 +270,7 @@
STATIC ArmLIR* newLIR2(CompilationUnit* cUnit, ArmOpcode opcode,
int dest, int src1)
{
- ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* insn = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
DCHECK(isPseudoOpcode(opcode) ||
(EncodingMap[opcode].flags & IS_BINARY_OP));
insn->opcode = opcode;
@@ -285,7 +285,7 @@
STATIC ArmLIR* newLIR3(CompilationUnit* cUnit, ArmOpcode opcode,
int dest, int src1, int src2)
{
- ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* insn = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
DCHECK(isPseudoOpcode(opcode) ||
(EncodingMap[opcode].flags & IS_TERTIARY_OP))
<< (int)opcode << " "
@@ -305,7 +305,7 @@
STATIC ArmLIR* newLIR4(CompilationUnit* cUnit, ArmOpcode opcode,
int dest, int src1, int src2, int info)
{
- ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* insn = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
DCHECK(isPseudoOpcode(opcode) ||
(EncodingMap[opcode].flags & IS_QUAD_OP));
insn->opcode = opcode;
@@ -365,7 +365,8 @@
{
/* Add the constant to the literal pool */
if (constantListP) {
- ArmLIR* newValue = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocData);
+ ArmLIR* newValue = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true,
+ kAllocData);
newValue->operands[0] = value;
newValue->generic.next = *constantListP;
*constantListP = (LIR*) newValue;
diff --git a/src/compiler/codegen/arm/LocalOptimizations.cc b/src/compiler/codegen/arm/LocalOptimizations.cc
index 2883209..9098627 100644
--- a/src/compiler/codegen/arm/LocalOptimizations.cc
+++ b/src/compiler/codegen/arm/LocalOptimizations.cc
@@ -236,7 +236,8 @@
/* Only sink store instructions */
if (sinkDistance && !isThisLIRLoad) {
ArmLIR* newStoreLIR =
- (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true,
+ kAllocLIR);
*newStoreLIR = *thisLIR;
/*
* Stop point found - insert *before* the checkLIR
@@ -423,7 +424,7 @@
/* Found a slot to hoist to */
if (slot >= 0) {
ArmLIR* curLIR = prevInstList[slot];
- ArmLIR* newLoadLIR = (ArmLIR* ) oatNew(sizeof(ArmLIR),
+ ArmLIR* newLoadLIR = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR),
true, kAllocLIR);
*newLoadLIR = *thisLIR;
/*
diff --git a/src/compiler/codegen/arm/MethodCodegenDriver.cc b/src/compiler/codegen/arm/MethodCodegenDriver.cc
index 1efab12..6866423 100644
--- a/src/compiler/codegen/arm/MethodCodegenDriver.cc
+++ b/src/compiler/codegen/arm/MethodCodegenDriver.cc
@@ -1861,8 +1861,8 @@
int opOffset = mir->dalvikInsn.opcode - kMirOpFirst;
char* msg = NULL;
if (cUnit->printMe) {
- msg = (char*)oatNew(strlen(extendedMIROpNames[opOffset]) + 1, false,
- kAllocDebugInfo);
+ msg = (char*)oatNew(cUnit, strlen(extendedMIROpNames[opOffset]) + 1,
+ false, kAllocDebugInfo);
strcpy(msg, extendedMIROpNames[opOffset]);
}
ArmLIR* op = newLIR1(cUnit, kArmPseudoExtended, (int) msg);
@@ -2051,7 +2051,7 @@
/* Mark the beginning of a Dalvik instruction for line tracking */
char* instStr = cUnit->printMe ?
- oatGetDalvikDisassembly(&mir->dalvikInsn, "") : NULL;
+ oatGetDalvikDisassembly(cUnit, &mir->dalvikInsn, "") : NULL;
boundaryLIR = newLIR1(cUnit, kArmPseudoDalvikByteCodeBoundary,
(intptr_t) instStr);
cUnit->boundaryMap.insert(std::make_pair(mir->offset,
@@ -2235,7 +2235,8 @@
{
/* Used to hold the labels of each block */
cUnit->blockLabelList =
- (void *) oatNew(sizeof(ArmLIR) * cUnit->numBlocks, true, kAllocLIR);
+ (void *) oatNew(cUnit, sizeof(ArmLIR) * cUnit->numBlocks, true,
+ kAllocLIR);
oatDataFlowAnalysisDispatcher(cUnit, methodBlockCodeGen,
kPreOrderDFSTraversal, false /* Iterative */);
diff --git a/src/compiler/codegen/arm/Thumb2/Factory.cc b/src/compiler/codegen/arm/Thumb2/Factory.cc
index 34ffa60..9b7d299 100644
--- a/src/compiler/codegen/arm/Thumb2/Factory.cc
+++ b/src/compiler/codegen/arm/Thumb2/Factory.cc
@@ -69,7 +69,8 @@
if (dataTarget == NULL) {
dataTarget = addWordData(cUnit, &cUnit->literalList, value);
}
- ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* loadPcRel = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true,
+ kAllocLIR);
loadPcRel->generic.dalvikOffset = cUnit->currentDalvikOffset;
loadPcRel->opcode = kThumb2Vldrs;
loadPcRel->generic.target = (LIR* ) dataTarget;
@@ -178,7 +179,8 @@
if (dataTarget == NULL) {
dataTarget = addWordData(cUnit, &cUnit->literalList, value);
}
- ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* loadPcRel = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true,
+ kAllocLIR);
loadPcRel->opcode = kThumb2LdrPcRel12;
loadPcRel->generic.target = (LIR* ) dataTarget;
loadPcRel->generic.dalvikOffset = cUnit->currentDalvikOffset;
@@ -655,7 +657,7 @@
dataTarget = addWideData(cUnit, &cUnit->literalList, valLo,
valHi);
}
- ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true,
+ ArmLIR* loadPcRel = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true,
kAllocLIR);
loadPcRel->generic.dalvikOffset = cUnit->currentDalvikOffset;
loadPcRel->opcode = kThumb2Vldrd;
@@ -1072,7 +1074,7 @@
STATIC ArmLIR* fpRegCopy(CompilationUnit* cUnit, int rDest, int rSrc)
{
- ArmLIR* res = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* res = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
res->generic.dalvikOffset = cUnit->currentDalvikOffset;
res->operands[0] = rDest;
res->operands[1] = rSrc;
@@ -1103,7 +1105,7 @@
ArmOpcode opcode;
if (FPREG(rDest) || FPREG(rSrc))
return fpRegCopy(cUnit, rDest, rSrc);
- res = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ res = (ArmLIR* ) oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
res->generic.dalvikOffset = cUnit->currentDalvikOffset;
if (LOWREG(rDest) && LOWREG(rSrc))
opcode = kThumbMovRR;
diff --git a/src/compiler/codegen/arm/Thumb2/Gen.cc b/src/compiler/codegen/arm/Thumb2/Gen.cc
index fe0d3f2..042ebb2 100644
--- a/src/compiler/codegen/arm/Thumb2/Gen.cc
+++ b/src/compiler/codegen/arm/Thumb2/Gen.cc
@@ -134,7 +134,7 @@
if (it == cUnit->boundaryMap.end()) {
LOG(FATAL) << "Error: didn't find vaddr 0x" << std::hex << vaddr;
}
- ArmLIR* newLabel = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* newLabel = (ArmLIR*)oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
newLabel->generic.dalvikOffset = vaddr;
newLabel->opcode = kArmPseudoCaseLabel;
newLabel->operands[0] = keyVal;
@@ -259,14 +259,14 @@
dumpSparseSwitchTable(table);
}
// Add the table to the list - we'll process it later
- SwitchTable *tabRec = (SwitchTable *)oatNew(sizeof(SwitchTable),
+ SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
true, kAllocData);
tabRec->table = table;
tabRec->vaddr = mir->offset;
int size = table[1];
- tabRec->targets = (ArmLIR* *)oatNew(size * sizeof(ArmLIR*), true,
+ tabRec->targets = (ArmLIR* *)oatNew(cUnit, size * sizeof(ArmLIR*), true,
kAllocLIR);
- oatInsertGrowableList(&cUnit->switchTables, (intptr_t)tabRec);
+ oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
// Get the switch value
rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
@@ -310,14 +310,14 @@
dumpPackedSwitchTable(table);
}
// Add the table to the list - we'll process it later
- SwitchTable *tabRec = (SwitchTable *)oatNew(sizeof(SwitchTable),
+ SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
true, kAllocData);
tabRec->table = table;
tabRec->vaddr = mir->offset;
int size = table[1];
- tabRec->targets = (ArmLIR* *)oatNew(size * sizeof(ArmLIR*), true,
+ tabRec->targets = (ArmLIR* *)oatNew(cUnit, size * sizeof(ArmLIR*), true,
kAllocLIR);
- oatInsertGrowableList(&cUnit->switchTables, (intptr_t)tabRec);
+ oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
// Get the switch value
rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
@@ -367,14 +367,14 @@
const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB;
// Add the table to the list - we'll process it later
FillArrayData *tabRec = (FillArrayData *)
- oatNew(sizeof(FillArrayData), true, kAllocData);
+ oatNew(cUnit, sizeof(FillArrayData), true, kAllocData);
tabRec->table = table;
tabRec->vaddr = mir->offset;
u2 width = tabRec->table[1];
u4 size = tabRec->table[2] | (((u4)tabRec->table[3]) << 16);
tabRec->size = (size * width) + 8;
- oatInsertGrowableList(&cUnit->fillArrayData, (intptr_t)tabRec);
+ oatInsertGrowableList(cUnit, &cUnit->fillArrayData, (intptr_t)tabRec);
// Making a call - use explicit registers
oatFlushAllRegs(cUnit); /* Everything to home location */
@@ -934,17 +934,17 @@
int numTemps = sizeof(coreTemps)/sizeof(*coreTemps);
int numFPRegs = sizeof(fpRegs)/sizeof(*fpRegs);
int numFPTemps = sizeof(fpTemps)/sizeof(*fpTemps);
- RegisterPool *pool = (RegisterPool *)oatNew(sizeof(*pool), true,
+ RegisterPool *pool = (RegisterPool *)oatNew(cUnit, sizeof(*pool), true,
kAllocRegAlloc);
cUnit->regPool = pool;
pool->numCoreRegs = numRegs;
pool->coreRegs = (RegisterInfo *)
- oatNew(numRegs * sizeof(*cUnit->regPool->coreRegs), true,
- kAllocRegAlloc);
+ oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs),
+ true, kAllocRegAlloc);
pool->numFPRegs = numFPRegs;
pool->FPRegs = (RegisterInfo *)
- oatNew(numFPRegs * sizeof(*cUnit->regPool->FPRegs), true,
- kAllocRegAlloc);
+ oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true,
+ kAllocRegAlloc);
oatInitPool(pool->coreRegs, coreRegs, pool->numCoreRegs);
oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs);
// Keep special registers from being allocated
@@ -963,7 +963,7 @@
oatMarkTemp(cUnit, fpTemps[i]);
}
// Construct the alias map.
- cUnit->phiAliasMap = (int*)oatNew(cUnit->numSSARegs *
+ cUnit->phiAliasMap = (int*)oatNew(cUnit, cUnit->numSSARegs *
sizeof(cUnit->phiAliasMap[0]), false,
kAllocDFInfo);
for (int i = 0; i < cUnit->numSSARegs; i++) {
@@ -1816,13 +1816,13 @@
ArmLIR* branch = opCondBranch(cUnit, kArmCondEq);
ArmLIR* retLab = newLIR0(cUnit, kArmPseudoTargetLabel);
retLab->defMask = ENCODE_ALL;
- ArmLIR* target = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR);
+ ArmLIR* target = (ArmLIR*)oatNew(cUnit, sizeof(ArmLIR), true, kAllocLIR);
target->generic.dalvikOffset = cUnit->currentDalvikOffset;
target->opcode = kArmPseudoSuspendTarget;
target->operands[0] = (intptr_t)retLab;
target->operands[1] = mir->offset;
branch->generic.target = (LIR*)target;
- oatInsertGrowableList(&cUnit->suspendLaunchpads, (intptr_t)target);
+ oatInsertGrowableList(cUnit, &cUnit->suspendLaunchpads, (intptr_t)target);
}
/*