commit b67f7e2d50cc02ce3fe84e57ebb1895b6341302e
author Aart Bik <ajcbik@google.com> Thu Jan 18 13:29:19 2018 -0800
committer Aart Bik <ajcbik@google.com> Thu Jan 18 13:30:51 2018 -0800
tree 72ee5e7b1e7a3a22f851c4cd1d3f33a046341459
parent 156aa7cf8f3d4e9ddcea84e173332fb18e094e5f

Minor edits.

Rationale:
make the DCHECK order consistent with other files.

Test: build
Change-Id: I6cdb186c2320f39bca0112659d558e2d6fe63772

compiler/optimizing/code_generator_vector_x86.cc

diff --git a/compiler/optimizing/code_generator_vector_x86.cc b/compiler/optimizing/code_generator_vector_x86.cc
index ad8128a..7b4b85d 100644
--- a/compiler/optimizing/code_generator_vector_x86.cc
+++ b/compiler/optimizing/code_generator_vector_x86.cc
@@ -92,8 +92,8 @@
       __ pshufd(dst, dst, Immediate(0));
       break;
     case DataType::Type::kInt64: {
-      XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
       DCHECK_EQ(2u, instruction->GetVectorLength());
+      XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
       __ movd(dst, locations->InAt(0).AsRegisterPairLow<Register>());
       __ movd(tmp, locations->InAt(0).AsRegisterPairHigh<Register>());
       __ punpckldq(dst, tmp);
@@ -101,13 +101,13 @@
       break;
     }
     case DataType::Type::kFloat32:
-      DCHECK(locations->InAt(0).Equals(locations->Out()));
       DCHECK_EQ(4u, instruction->GetVectorLength());
+      DCHECK(locations->InAt(0).Equals(locations->Out()));
       __ shufps(dst, dst, Immediate(0));
       break;
     case DataType::Type::kFloat64:
-      DCHECK(locations->InAt(0).Equals(locations->Out()));
       DCHECK_EQ(2u, instruction->GetVectorLength());
+      DCHECK(locations->InAt(0).Equals(locations->Out()));
       __ shufpd(dst, dst, Immediate(0));
       break;
     default:
@@ -160,8 +160,8 @@
       __ movd(locations->Out().AsRegister<Register>(), src);
       break;
     case DataType::Type::kInt64: {
-      XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
       DCHECK_EQ(2u, instruction->GetVectorLength());
+      XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
       __ movd(locations->Out().AsRegisterPairLow<Register>(), src);
       __ pshufd(tmp, src, Immediate(1));
       __ movd(locations->Out().AsRegisterPairHigh<Register>(), tmp);
@@ -1022,8 +1022,8 @@
       __ movd(dst, locations->InAt(0).AsRegister<Register>());
       break;
     case DataType::Type::kInt64: {
-      XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
       DCHECK_EQ(2u, instruction->GetVectorLength());
+      XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
       __ xorps(tmp, tmp);
       __ movd(dst, locations->InAt(0).AsRegisterPairLow<Register>());
       __ movd(tmp, locations->InAt(0).AsRegisterPairHigh<Register>());