commit b1eba213afaf7fa6445de863ddc9680ab99762ea
author Brian Carlstrom <bdc@google.com> Wed Jul 17 18:07:19 2013 -0700
committer Brian Carlstrom <bdc@google.com> Wed Jul 17 21:46:11 2013 -0700
tree c0a3000df1037211a6bcc7d75db51ee5c6069ec8
parent 2ce745c06271d5223d57dbf08117b20d5b60694a

Fix cpplint whitespace/comma issues

Change-Id: I456fc8d80371d6dfc07e6d109b7f478c25602b65

compiler/dex/quick/mips/mips_lir.h

diff --git a/compiler/dex/quick/mips/mips_lir.h b/compiler/dex/quick/mips/mips_lir.h
index 8a99e93..ce25d73 100644
--- a/compiler/dex/quick/mips/mips_lir.h
+++ b/compiler/dex/quick/mips/mips_lir.h
@@ -105,7 +105,7 @@
  * rework is done in this area.  Also, it is a good reminder in the calling
  * code that reg locations always describe doubles as a pair of singles.
  */
-#define MIPS_S2D(x,y) ((x) | MIPS_FP_DOUBLE)
+#define MIPS_S2D(x, y) ((x) | MIPS_FP_DOUBLE)
 // Mask to strip off fp flags.
 #define MIPS_FP_REG_MASK (MIPS_FP_REG_OFFSET-1)
 
@@ -148,7 +148,7 @@
                                  INVALID_REG, INVALID_SREG, INVALID_SREG}
 #define MIPS_LOC_C_RETURN_WIDE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_RESULT0, \
                                 r_RESULT1, INVALID_SREG, INVALID_SREG}
-#define MIPS_LOC_C_RETURN_DOUBLE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_FRESULT0,\
+#define MIPS_LOC_C_RETURN_DOUBLE {kLocPhysReg, 1, 0, 0, 0, 0, 0, 0, 1, r_FRESULT0, \
                                   r_FRESULT1, INVALID_SREG, INVALID_SREG}
 
 enum MipsResourceEncodingPos {

compiler/dex/quick/mips/target_mips.cc

diff --git a/compiler/dex/quick/mips/target_mips.cc b/compiler/dex/quick/mips/target_mips.cc
index bd20e00..43e905c 100644
--- a/compiler/dex/quick/mips/target_mips.cc
+++ b/compiler/dex/quick/mips/target_mips.cc
@@ -172,41 +172,41 @@
          operand = lir->operands[nc-'0'];
          switch (*fmt++) {
            case 'b':
-             strcpy(tbuf,"0000");
+             strcpy(tbuf, "0000");
              for (i=3; i>= 0; i--) {
                tbuf[i] += operand & 1;
                operand >>= 1;
              }
              break;
            case 's':
-             sprintf(tbuf,"$f%d",operand & MIPS_FP_REG_MASK);
+             sprintf(tbuf, "$f%d", operand & MIPS_FP_REG_MASK);
              break;
            case 'S':
              DCHECK_EQ(((operand & MIPS_FP_REG_MASK) & 1), 0);
-             sprintf(tbuf,"$f%d",operand & MIPS_FP_REG_MASK);
+             sprintf(tbuf, "$f%d", operand & MIPS_FP_REG_MASK);
              break;
            case 'h':
-             sprintf(tbuf,"%04x", operand);
+             sprintf(tbuf, "%04x", operand);
              break;
            case 'M':
            case 'd':
-             sprintf(tbuf,"%d", operand);
+             sprintf(tbuf, "%d", operand);
              break;
            case 'D':
-             sprintf(tbuf,"%d", operand+1);
+             sprintf(tbuf, "%d", operand+1);
              break;
            case 'E':
-             sprintf(tbuf,"%d", operand*4);
+             sprintf(tbuf, "%d", operand*4);
              break;
            case 'F':
-             sprintf(tbuf,"%d", operand*2);
+             sprintf(tbuf, "%d", operand*2);
              break;
            case 't':
-             sprintf(tbuf,"0x%08x (L%p)", reinterpret_cast<uintptr_t>(base_addr) + lir->offset + 4 +
+             sprintf(tbuf, "0x%08x (L%p)", reinterpret_cast<uintptr_t>(base_addr) + lir->offset + 4 +
                      (operand << 2), lir->target);
              break;
            case 'T':
-             sprintf(tbuf,"0x%08x", operand << 2);
+             sprintf(tbuf, "0x%08x", operand << 2);
              break;
            case 'u': {
              int offset_1 = lir->operands[0];
@@ -231,7 +231,7 @@
              strcpy(tbuf, ";  nop");
              break;
            default:
-             strcpy(tbuf,"DecodeError");
+             strcpy(tbuf, "DecodeError");
              break;
          }
          buf += tbuf;

compiler/dex/quick/mips/utility_mips.cc

diff --git a/compiler/dex/quick/mips/utility_mips.cc b/compiler/dex/quick/mips/utility_mips.cc
index 089764f..1975d1a 100644
--- a/compiler/dex/quick/mips/utility_mips.cc
+++ b/compiler/dex/quick/mips/utility_mips.cc
@@ -24,7 +24,7 @@
 LIR* MipsMir2Lir::OpFpRegCopy(int r_dest, int r_src) {
   int opcode;
   /* must be both DOUBLE or both not DOUBLE */
-  DCHECK_EQ(MIPS_DOUBLEREG(r_dest),MIPS_DOUBLEREG(r_src));
+  DCHECK_EQ(MIPS_DOUBLEREG(r_dest), MIPS_DOUBLEREG(r_src));
   if (MIPS_DOUBLEREG(r_dest)) {
     opcode = kMipsFmovd;
   } else {