MIPS32: Allow some patched instructions in delay slots
Test: test-art-host-gtest
Test: booted MIPS64 (with 2nd arch MIPS32R6) in QEMU
Test: test-art-target-gtest32
Test: testrunner.py --target --optimizing --32
Test: same tests as above on CI20
Test: booted MIPS32R2 in QEMU
Change-Id: I7e1ba59993008014d0115ae20c56e0a71fef0fb0
diff --git a/compiler/utils/label.h b/compiler/utils/label.h
index 85710d0..d835c63 100644
--- a/compiler/utils/label.h
+++ b/compiler/utils/label.h
@@ -31,9 +31,11 @@
} // namespace arm64
namespace mips {
class MipsAssembler;
+ class MipsLabel;
} // namespace mips
namespace mips64 {
class Mips64Assembler;
+ class Mips64Label;
} // namespace mips64
namespace x86 {
class X86Assembler;
@@ -114,7 +116,9 @@
friend class arm64::Arm64Assembler;
friend class mips::MipsAssembler;
+ friend class mips::MipsLabel;
friend class mips64::Mips64Assembler;
+ friend class mips64::Mips64Label;
friend class x86::X86Assembler;
friend class x86::NearLabel;
friend class x86_64::X86_64Assembler;