riscv64: add sig handler to CFI ignore list
Test: m check_cfi
Bug: 283082047
Change-Id: Id2a907117f33ddb2bd50753d445c440afce519b4
diff --git a/tools/check_cfi.py b/tools/check_cfi.py
index 83ee363..55b622d 100755
--- a/tools/check_cfi.py
+++ b/tools/check_cfi.py
@@ -38,7 +38,7 @@
# Saves/restores SP in other register.
"art_quick_generic_jni_trampoline": ["arm", "i386", "x86_64"],
# Starts with non-zero offset at the start of the method.
- "art_quick_throw_null_pointer_exception_from_signal": ["arm", "aarch64", "i386", "x86_64"],
+ "art_quick_throw_null_pointer_exception_from_signal": ARCHES,
# Pops stack without static control flow past the opcode.
"nterp_op_return": ["arm", "aarch64", "i386", "x86_64", "riscv64"],
}