riscv64: Add extension restrictions to assembler.

Use them to select different implementations of the `Zext*`
and `Sext*` macros and ensure that LR/SC sequences contain
only permitted instructions.

Test: m test-art-host-gtest
Test: run-gtests.sh
Test: testrunner.py --target --optimizing
Bug: 283082089
Change-Id: I3c306eecc123e5f10a0181942f1cd3dad7ec9a4c
5 files changed