riscv64: pointer-width load/store

Match load/store widths to the data fields being accessed.

Test: Run ART test 001-HelloWorld on a Linux RISC-V VM:
  lunch aosp_riscv64-userdebug

  export ART_TEST_SSH_USER=ubuntu
  export ART_TEST_SSH_HOST=localhost
  export ART_TEST_SSH_PORT=10001
  export ART_TEST_ON_VM=true

  . art/tools/buildbot-utils.sh
  art/tools/buildbot-build.sh --target

  # Create, boot and configure the VM.
  art/tools/buildbot-vm.sh create
  art/tools/buildbot-vm.sh boot
  art/tools/buildbot-vm.sh setup-ssh  # password: 'ubuntu'

  art/tools/buildbot-cleanup-device.sh
  art/tools/buildbot-setup-device.sh
  art/tools/buildbot-sync.sh

  # Test Nterp (first revert https://r.android.com/2547153 in local build)
  art/test.py --target -r --no-prebuild --ndebug --64 001-HelloWorld
  # SIGILL in nterp_op_new_array

Change-Id: I8fe2c81f7cb1d4c3793e00e424da2310b55903e9
1 file changed