Quick compiler (arm64) Fix inline Math.round()
Math.round is detected and inlined for arm64. However, the
arm64 backend incorrectly modified a source operand in place
during the round sequence. Depending on how registers are
allocated, that modification could persist. Changed to use a
temp register for the intermediate result.
Internal b/17411468
Change-Id: I7c636f985e193f8ff838768fde3b741e443bb1bb
diff --git a/compiler/dex/quick/arm64/fp_arm64.cc b/compiler/dex/quick/arm64/fp_arm64.cc
index 5d63dd0..a39d151 100644
--- a/compiler/dex/quick/arm64/fp_arm64.cc
+++ b/compiler/dex/quick/arm64/fp_arm64.cc
@@ -426,11 +426,12 @@
RegLocation rl_dest = (is_double) ? InlineTargetWide(info) : InlineTarget(info);
rl_src = (is_double) ? LoadValueWide(rl_src, kFPReg) : LoadValue(rl_src, kFPReg);
RegLocation rl_result = EvalLoc(rl_dest, kCoreReg, true);
+ RegStorage r_imm_point5 = (is_double) ? AllocTempDouble() : AllocTempSingle();
RegStorage r_tmp = (is_double) ? AllocTempDouble() : AllocTempSingle();
// 0.5f and 0.5d are encoded in the same way.
- NewLIR2(kA64Fmov2fI | wide, r_tmp.GetReg(), encoded_imm);
- NewLIR3(kA64Fadd3fff | wide, rl_src.reg.GetReg(), rl_src.reg.GetReg(), r_tmp.GetReg());
- NewLIR2((is_double) ? kA64Fcvtms2xS : kA64Fcvtms2ws, rl_result.reg.GetReg(), rl_src.reg.GetReg());
+ NewLIR2(kA64Fmov2fI | wide, r_imm_point5.GetReg(), encoded_imm);
+ NewLIR3(kA64Fadd3fff | wide, r_tmp.GetReg(), rl_src.reg.GetReg(), r_imm_point5.GetReg());
+ NewLIR2((is_double) ? kA64Fcvtms2xS : kA64Fcvtms2ws, rl_result.reg.GetReg(), r_tmp.GetReg());
(is_double) ? StoreValueWide(rl_dest, rl_result) : StoreValue(rl_dest, rl_result);
return true;
}