tree afd225f51d28a77329bc2590a025400e088f260c
parent 00cca3a275562d110a8b35094b9b12fac37f67ab
author Roland Levillain <rpl@google.com> 1494507843 +0100
committer Roland Levillain <rpl@google.com> 1499791407 +0100

Introduce a Marking Register in ARM64 code generation.

When generating code for ARM64, maintain the status of
Thread::Current()->GetIsGcMarking() in register X20,
dubbed MR (Marking Register), and check the value of that
register (instead of loading and checking a read barrier
marking entrypoint) in read barriers.

Test: m test-art-target
Test: m test-art-target with tree built with ART_USE_READ_BARRIER=false
Test: ARM64 device boot test
Bug: 37707231
Change-Id: Ibe9bc5c99a2176b0a0476e9e9ad7fcc9f745017b