Remove the old CFI infrastructure.
Change-Id: I12a17a8a1c39ffccaa499c328ebac36e4d74dc4e
diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc
index b3a1376..4b71412 100644
--- a/compiler/utils/x86/assembler_x86.cc
+++ b/compiler/utils/x86/assembler_x86.cc
@@ -20,7 +20,6 @@
#include "entrypoints/quick/quick_entrypoints.h"
#include "memory_region.h"
#include "thread.h"
-#include "utils/dwarf_cfi.h"
namespace art {
namespace x86 {
@@ -1631,69 +1630,32 @@
EmitOperand(reg_or_opcode, Operand(operand));
}
-void X86Assembler::InitializeFrameDescriptionEntry() {
- WriteFDEHeader(&cfi_info_, false /* is_64bit */);
-}
-
-void X86Assembler::FinalizeFrameDescriptionEntry() {
- WriteFDEAddressRange(&cfi_info_, buffer_.Size(), false /* is_64bit */);
- PadCFI(&cfi_info_);
- WriteCFILength(&cfi_info_, false /* is_64bit */);
-}
-
constexpr size_t kFramePointerSize = 4;
void X86Assembler::BuildFrame(size_t frame_size, ManagedRegister method_reg,
const std::vector<ManagedRegister>& spill_regs,
const ManagedRegisterEntrySpills& entry_spills) {
- cfi_cfa_offset_ = kFramePointerSize; // Only return address on stack
- cfi_pc_ = buffer_.Size(); // Nothing emitted yet
- DCHECK_EQ(cfi_pc_, 0U);
-
- uint32_t reg_offset = 1;
+ DCHECK_EQ(buffer_.Size(), 0U); // Nothing emitted yet.
CHECK_ALIGNED(frame_size, kStackAlignment);
int gpr_count = 0;
for (int i = spill_regs.size() - 1; i >= 0; --i) {
- x86::X86ManagedRegister spill = spill_regs.at(i).AsX86();
- DCHECK(spill.IsCpuRegister());
- pushl(spill.AsCpuRegister());
+ Register spill = spill_regs.at(i).AsX86().AsCpuRegister();
+ pushl(spill);
gpr_count++;
-
- // DW_CFA_advance_loc
- DW_CFA_advance_loc(&cfi_info_, buffer_.Size() - cfi_pc_);
- cfi_pc_ = buffer_.Size();
- // DW_CFA_def_cfa_offset
- cfi_cfa_offset_ += kFramePointerSize;
- DW_CFA_def_cfa_offset(&cfi_info_, cfi_cfa_offset_);
- // DW_CFA_offset reg offset
- reg_offset++;
- DW_CFA_offset(&cfi_info_, spill_regs.at(i).AsX86().DWARFRegId(), reg_offset);
}
- // return address then method on stack
+ // return address then method on stack.
int32_t adjust = frame_size - (gpr_count * kFramePointerSize) -
sizeof(StackReference<mirror::ArtMethod>) /*method*/ -
kFramePointerSize /*return address*/;
addl(ESP, Immediate(-adjust));
- // DW_CFA_advance_loc
- DW_CFA_advance_loc(&cfi_info_, buffer_.Size() - cfi_pc_);
- cfi_pc_ = buffer_.Size();
- // DW_CFA_def_cfa_offset
- cfi_cfa_offset_ += adjust;
- DW_CFA_def_cfa_offset(&cfi_info_, cfi_cfa_offset_);
-
pushl(method_reg.AsX86().AsCpuRegister());
- // DW_CFA_advance_loc
- DW_CFA_advance_loc(&cfi_info_, buffer_.Size() - cfi_pc_);
- cfi_pc_ = buffer_.Size();
- // DW_CFA_def_cfa_offset
- cfi_cfa_offset_ += kFramePointerSize;
- DW_CFA_def_cfa_offset(&cfi_info_, cfi_cfa_offset_);
for (size_t i = 0; i < entry_spills.size(); ++i) {
ManagedRegisterSpill spill = entry_spills.at(i);
if (spill.AsX86().IsCpuRegister()) {
- movl(Address(ESP, frame_size + spill.getSpillOffset()), spill.AsX86().AsCpuRegister());
+ int offset = frame_size + spill.getSpillOffset();
+ movl(Address(ESP, offset), spill.AsX86().AsCpuRegister());
} else {
DCHECK(spill.AsX86().IsXmmRegister());
if (spill.getSize() == 8) {
@@ -1709,8 +1671,9 @@
void X86Assembler::RemoveFrame(size_t frame_size,
const std::vector<ManagedRegister>& spill_regs) {
CHECK_ALIGNED(frame_size, kStackAlignment);
- addl(ESP, Immediate(frame_size - (spill_regs.size() * kFramePointerSize) -
- sizeof(StackReference<mirror::ArtMethod>)));
+ int adjust = frame_size - (spill_regs.size() * kFramePointerSize) -
+ sizeof(StackReference<mirror::ArtMethod>);
+ addl(ESP, Immediate(adjust));
for (size_t i = 0; i < spill_regs.size(); ++i) {
x86::X86ManagedRegister spill = spill_regs.at(i).AsX86();
DCHECK(spill.IsCpuRegister());
@@ -1722,12 +1685,6 @@
void X86Assembler::IncreaseFrameSize(size_t adjust) {
CHECK_ALIGNED(adjust, kStackAlignment);
addl(ESP, Immediate(-adjust));
- // DW_CFA_advance_loc
- DW_CFA_advance_loc(&cfi_info_, buffer_.Size() - cfi_pc_);
- cfi_pc_ = buffer_.Size();
- // DW_CFA_def_cfa_offset
- cfi_cfa_offset_ += adjust;
- DW_CFA_def_cfa_offset(&cfi_info_, cfi_cfa_offset_);
}
void X86Assembler::DecreaseFrameSize(size_t adjust) {
diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h
index bdf8843..046df02 100644
--- a/compiler/utils/x86/assembler_x86.h
+++ b/compiler/utils/x86/assembler_x86.h
@@ -205,7 +205,7 @@
class X86Assembler FINAL : public Assembler {
public:
- explicit X86Assembler() : cfi_cfa_offset_(0), cfi_pc_(0) {}
+ explicit X86Assembler() {}
virtual ~X86Assembler() {}
/*
@@ -599,12 +599,6 @@
// and branch to a ExceptionSlowPath if it is.
void ExceptionPoll(ManagedRegister scratch, size_t stack_adjust) OVERRIDE;
- void InitializeFrameDescriptionEntry() OVERRIDE;
- void FinalizeFrameDescriptionEntry() OVERRIDE;
- std::vector<uint8_t>* GetFrameDescriptionEntry() OVERRIDE {
- return &cfi_info_;
- }
-
private:
inline void EmitUint8(uint8_t value);
inline void EmitInt32(int32_t value);
@@ -623,9 +617,6 @@
void EmitGenericShift(int rm, Register reg, const Immediate& imm);
void EmitGenericShift(int rm, Register operand, Register shifter);
- std::vector<uint8_t> cfi_info_;
- uint32_t cfi_cfa_offset_, cfi_pc_;
-
DISALLOW_COPY_AND_ASSIGN(X86Assembler);
};
diff --git a/compiler/utils/x86/managed_register_x86.h b/compiler/utils/x86/managed_register_x86.h
index 5d46ee2..09d2b49 100644
--- a/compiler/utils/x86/managed_register_x86.h
+++ b/compiler/utils/x86/managed_register_x86.h
@@ -88,14 +88,6 @@
// There is a one-to-one mapping between ManagedRegister and register id.
class X86ManagedRegister : public ManagedRegister {
public:
- int DWARFRegId() const {
- CHECK(IsCpuRegister());
- // For all the X86 registers we care about:
- // EAX, ECX, EDX, EBX, ESP, EBP, ESI, EDI,
- // DWARF register id is the same as id_.
- return static_cast<int>(id_);
- }
-
ByteRegister AsByteRegister() const {
CHECK(IsCpuRegister());
CHECK_LT(AsCpuRegister(), ESP); // ESP, EBP, ESI and EDI cannot be encoded as byte registers.