commit 8ae3ffb29489a127f2a6242c33845dac8d50e508
author Mark Mendell <mark.p.mendell@intel.com> Wed Aug 12 21:16:41 2015 -0400
committer Mark Mendell <mark.p.mendell@intel.com> Fri Aug 14 12:58:40 2015 -0400
tree cb5cc72e4a699a8ef6b044d530539c13b02604b7
parent f67ab129d868b8355a8403a9627f96ac1e41a796

Add 'bsr' instruction to x86 and x86_64

Add support for 'bsr' instruction.  Add tests.

Change-Id: I1cd8b30d7f3f5ee7fbeef8124cc6a31bf8ce59d5
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>

compiler/utils/x86/assembler_x86.cc

diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc
index 914bd56..9b3d792 100644
--- a/compiler/utils/x86/assembler_x86.cc
+++ b/compiler/utils/x86/assembler_x86.cc
@@ -158,6 +158,20 @@
   EmitUint8(0xC8 + dst);
 }
 
+void X86Assembler::bsrl(Register dst, Register src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0xBD);
+  EmitRegisterOperand(dst, src);
+}
+
+void X86Assembler::bsrl(Register dst, const Address& src) {
+  AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+  EmitUint8(0x0F);
+  EmitUint8(0xBD);
+  EmitOperand(dst, src);
+}
+
 void X86Assembler::movzxb(Register dst, ByteRegister src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0x0F);