Fixes to x86 register promotion and load hoisting.
Fixed a check to ensure that the mvzxb source register can be byte
accessed, not the destination reg.
Disabled branch fusion for x86 since code generation for that is
unimplemented.
Changed regId mask for x86 to allow proper masking of double registers.
Also added more output to the disassembler.
Change-Id: Idc0a949755ec9ae7b6d5dba38caa5ac01fcc5713
diff --git a/src/disassembler_x86.cc b/src/disassembler_x86.cc
index d45d641..f70289f 100644
--- a/src/disassembler_x86.cc
+++ b/src/disassembler_x86.cc
@@ -513,6 +513,8 @@
break;
case 0xB6: opcode << "movzxb"; has_modrm = true; load = true; break;
case 0xB7: opcode << "movzxw"; has_modrm = true; load = true; break;
+ case 0xBE: opcode << "movsxb"; has_modrm = true; load = true; break;
+ case 0xBF: opcode << "movsxw"; has_modrm = true; load = true; break;
default:
opcode << StringPrintf("unknown opcode '0F %02X'", *instr);
break;