commit 7d48dcd51db4b950c22ec78ef3caa53fdf4214d3
author Evgeny Astigeevich <evgeny.astigeevich@linaro.org> Wed Oct 16 12:46:28 2019 +0100
committer Treehugger Robot <treehugger-gerrit@google.com> Thu Oct 31 14:56:52 2019 +0000
tree 72600968b1daf5682018880f20ca07610e62b8e7
parent f05f04b429a63eb036f501866a863109f05b95b2

ARM64: Move from FPRegister to VRegister based API

VIXL has had FPRegister as an alias for VRegister for backward
compatibility. In the latest upstream VIXL the alias has been removed and all
FPRegister based API has became VRegister based. As AOSP VIXL is being
updated to the latest upstream VIXL all uses of FPRegister based API
must be replaced with VRegister based API.
This CL moves ART from FPRegister based API to VRegister based API.

Test: test.py --host --optimizing --jit --gtest
Test: test.py --target --optimizing --jit
Test: run-gtests.sh
Change-Id: I12541c16d0557835ea19c8667ae18c6601359b05

compiler/optimizing/intrinsics_arm64.cc

diff --git a/compiler/optimizing/intrinsics_arm64.cc b/compiler/optimizing/intrinsics_arm64.cc
index 6a666c9..c48aaf5 100644
--- a/compiler/optimizing/intrinsics_arm64.cc
+++ b/compiler/optimizing/intrinsics_arm64.cc
@@ -90,8 +90,8 @@
     Register res_reg = RegisterFrom(ARM64ReturnLocation(type), type);
     __ Mov(trg_reg, res_reg, kDiscardForSameWReg);
   } else {
-    FPRegister trg_reg = FPRegisterFrom(trg, type);
-    FPRegister res_reg = FPRegisterFrom(ARM64ReturnLocation(type), type);
+    VRegister trg_reg = FPRegisterFrom(trg, type);
+    VRegister res_reg = FPRegisterFrom(ARM64ReturnLocation(type), type);
     __ Fmov(trg_reg, res_reg);
   }
 }
@@ -435,7 +435,7 @@
 
   Register src = InputRegisterAt(instr, 0);
   Register dst = RegisterFrom(instr->GetLocations()->Out(), type);
-  FPRegister fpr = (type == DataType::Type::kInt64) ? temps.AcquireD() : temps.AcquireS();
+  VRegister fpr = (type == DataType::Type::kInt64) ? temps.AcquireD() : temps.AcquireS();
 
   __ Fmov(fpr, src);
   __ Cnt(fpr.V8B(), fpr.V8B());
@@ -591,8 +591,8 @@
   // For example, FCVTPS(-1.9) = -1 and FCVTPS(1.1) = 2.
   // If we were using this instruction, for most inputs, more handling code would be needed.
   LocationSummary* l = invoke->GetLocations();
-  FPRegister in_reg = is_double ? DRegisterFrom(l->InAt(0)) : SRegisterFrom(l->InAt(0));
-  FPRegister tmp_fp = is_double ? DRegisterFrom(l->GetTemp(0)) : SRegisterFrom(l->GetTemp(0));
+  VRegister in_reg = is_double ? DRegisterFrom(l->InAt(0)) : SRegisterFrom(l->InAt(0));
+  VRegister tmp_fp = is_double ? DRegisterFrom(l->GetTemp(0)) : SRegisterFrom(l->GetTemp(0));
   Register out_reg = is_double ? XRegisterFrom(l->Out()) : WRegisterFrom(l->Out());
   vixl::aarch64::Label done;
 
@@ -2015,7 +2015,7 @@
 
   if (mirror::kUseStringCompression) {
     // For compressed strings, acquire a SIMD temporary register.
-    FPRegister vtmp1 = temps.AcquireVRegisterOfSize(kQRegSize);
+    VRegister vtmp1 = temps.AcquireVRegisterOfSize(kQRegSize);
     const size_t c_char_size = DataType::Size(DataType::Type::kInt8);
     DCHECK_EQ(c_char_size, 1u);
     __ Bind(&compressed_string_preloop);
@@ -3210,8 +3210,8 @@
   MacroAssembler* masm = GetVIXLAssembler();
   UseScratchRegisterScope scratch_scope(masm);
   Register bits = InputRegisterAt(invoke, 0);
-  FPRegister out = SRegisterFrom(invoke->GetLocations()->Out());
-  FPRegister half = scratch_scope.AcquireH();
+  VRegister out = SRegisterFrom(invoke->GetLocations()->Out());
+  VRegister half = scratch_scope.AcquireH();
   __ Fmov(half, bits);  // ARMv8.2
   __ Fcvt(out, half);
 }
@@ -3232,8 +3232,8 @@
   DCHECK(codegen_->GetInstructionSetFeatures().HasFP16());
   MacroAssembler* masm = GetVIXLAssembler();
   UseScratchRegisterScope scratch_scope(masm);
-  FPRegister in = SRegisterFrom(invoke->GetLocations()->InAt(0));
-  FPRegister half = scratch_scope.AcquireH();
+  VRegister in = SRegisterFrom(invoke->GetLocations()->InAt(0));
+  VRegister half = scratch_scope.AcquireH();
   Register out = WRegisterFrom(invoke->GetLocations()->Out());
   __ Fcvt(half, in);
   __ Fmov(out, half);