commit 77dbcdd24fc99938c37ab0a32373466838ec8880
author Ian Rogers <irogers@google.com> Wed Nov 05 21:21:46 2014 +0000
committer Gerrit Code Review <noreply-gerritcodereview@google.com> Wed Nov 05 21:21:46 2014 +0000
tree 2646dc486174f1e6fed9dbcfe834d8cc2d90c129
parent 40845d266e1152a846858d94cee70c33b136de68
parent 02c637e8d6952aba19a432e01fc94cece5071e2f

Merge "Fix LoadValue{Wide} to free temp when reg classes are not matched"

compiler/dex/quick/gen_loadstore.cc

diff --git a/compiler/dex/quick/gen_loadstore.cc b/compiler/dex/quick/gen_loadstore.cc
index 39b40a0..d314601 100644
--- a/compiler/dex/quick/gen_loadstore.cc
+++ b/compiler/dex/quick/gen_loadstore.cc
@@ -149,8 +149,9 @@
       // Wrong register class, realloc, copy and transfer ownership.
       RegStorage new_reg = AllocTypedTemp(rl_src.fp, op_kind);
       OpRegCopy(new_reg, rl_src.reg);
-      // Clobber the old reg.
+      // Clobber the old regs and free it.
       Clobber(rl_src.reg);
+      FreeTemp(rl_src.reg);
       // ...and mark the new one live.
       rl_src.reg = new_reg;
       MarkLive(rl_src);
@@ -232,8 +233,9 @@
       // Wrong register class, realloc, copy and transfer ownership.
       RegStorage new_regs = AllocTypedTempWide(rl_src.fp, op_kind);
       OpRegCopyWide(new_regs, rl_src.reg);
-      // Clobber the old regs.
+      // Clobber the old regs and free it.
       Clobber(rl_src.reg);
+      FreeTemp(rl_src.reg);
       // ...and mark the new ones live.
       rl_src.reg = new_regs;
       MarkLive(rl_src);