tree eb61ed86fcaa5c168b1bbb301c931179f107b7e7
parent e03864e99f5ab0e27a48a17275122ad8f324b615
author Roland Levillain <rpl@google.com> 1415122991 +0000
committer Roland Levillain <rpl@google.com> 1415122991 +0000

Fix store instructions to large frames in ARM opt. compiler.

When accessing a stack frame at a large offset, use an
additional core register (R5 or R6) as a temporary register
whenever IP contains the value to store (and thus cannot be
used by art::Thumb2Assembler::StoreToOffset as a temporary
register to compute the memory address where the value is
to be stored).  The previous value of R5 (or R6) is saved
on the stack before the emission of the store instruction
and restored afterwards.

Change-Id: Ic5fd5ab2c09d8327dd1f0f241d40d2c397ce64cd