MIPS32: Fix and refactor in/out reg mask code
This is mostly for clarity and future work.
This fixes the following:
- aui has an out reg, not an in/out reg
- maddv.df, msubv.df, fmadd.df, fmsub.df have an
in/out reg, not a simply out reg
This also ensures consistent marking of even-numbered 32-bit
FPRs used by FPR load and store instructions (odd-numbered
32-bit FPRs remain unmarked as if there are no paired FPRs;
we don't use odd-numbered 32-bit FPRs to hold single-precision
values).
Test: test-art-host-gtest
Test: booted MIPS32R2 in QEMU
Test: booted MIPS64R6 in QEMU
Test: testrunner.py --target --optimizing --32
(on CI20 and MIPS32R6)
Test: test-art-target-gtest32
(on CI20 and MIPS32R6)
Change-Id: I408b8ac063c9b1cc6f036dda095d1e3e1e2e1ef1
2 files changed