Change assembler to use byte instruction lengths
Change the Arm & Mips instruction templaces to record instruction
size in bytes rather than half-words. Also includes a few Mips
changes to get us in compilable state.
Change-Id: I5a4f6cbd0cb0569805d9dfbd341c244152e59ac7
diff --git a/src/compiler/codegen/mips/Assemble.cc b/src/compiler/codegen/mips/Assemble.cc
index cb355c0..bf54d23 100644
--- a/src/compiler/codegen/mips/Assemble.cc
+++ b/src/compiler/codegen/mips/Assemble.cc
@@ -80,321 +80,321 @@
ENCODING_MAP(kMips32BitData, 0x00000000,
kFmtBitBlt, 31, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP,
- "data", "0x!0h(!0d)", 2),
+ "data", "0x!0h(!0d)", 4),
ENCODING_MAP(kMipsAddiu, 0x24000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "addiu", "!0r,!1r,0x!2h(!2d)", 2),
+ "addiu", "!0r,!1r,0x!2h(!2d)", 4),
ENCODING_MAP(kMipsAddu, 0x00000021,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "addu", "!0r,!1r,!2r", 2),
+ "addu", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsAnd, 0x00000024,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "and", "!0r,!1r,!2r", 2),
+ "and", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsAndi, 0x30000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "andi", "!0r,!1r,0x!2h(!2d)", 2),
+ "andi", "!0r,!1r,0x!2h(!2d)", 4),
ENCODING_MAP(kMipsB, 0x10000000,
kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH,
- "b", "!0t", 2),
+ "b", "!0t", 4),
ENCODING_MAP(kMipsBal, 0x04110000,
kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | REG_DEF_LR,
- "bal", "!0t", 2),
+ "bal", "!0t", 4),
ENCODING_MAP(kMipsBeq, 0x10000000,
kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0,
kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_USE01,
- "beq", "!0r,!1r,!2t", 2),
+ "beq", "!0r,!1r,!2t", 4),
ENCODING_MAP(kMipsBeqz, 0x10000000, /* same as beq above with t = $zero */
kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
- "beqz", "!0r,!1t", 2),
+ "beqz", "!0r,!1t", 4),
ENCODING_MAP(kMipsBgez, 0x04010000,
kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
- "bgez", "!0r,!1t", 2),
+ "bgez", "!0r,!1t", 4),
ENCODING_MAP(kMipsBgtz, 0x1C000000,
kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
- "bgtz", "!0r,!1t", 2),
+ "bgtz", "!0r,!1t", 4),
ENCODING_MAP(kMipsBlez, 0x18000000,
kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
- "blez", "!0r,!1t", 2),
+ "blez", "!0r,!1t", 4),
ENCODING_MAP(kMipsBltz, 0x04000000,
kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
- "bltz", "!0r,!1t", 2),
+ "bltz", "!0r,!1t", 4),
ENCODING_MAP(kMipsBnez, 0x14000000, /* same as bne below with t = $zero */
kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
- "bnez", "!0r,!1t", 2),
+ "bnez", "!0r,!1t", 4),
ENCODING_MAP(kMipsBne, 0x14000000,
kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0,
kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_USE01,
- "bne", "!0r,!1r,!2t", 2),
+ "bne", "!0r,!1r,!2t", 4),
ENCODING_MAP(kMipsDiv, 0x0000001a,
kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtBitBlt, 25, 21,
kFmtBitBlt, 20, 16, IS_QUAD_OP | REG_DEF01 | REG_USE23,
- "div", "!2r,!3r", 2),
+ "div", "!2r,!3r", 4),
#if __mips_isa_rev>=2
ENCODING_MAP(kMipsExt, 0x7c000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21, kFmtBitBlt, 10, 6,
kFmtBitBlt, 15, 11, IS_QUAD_OP | REG_DEF0 | REG_USE1,
- "ext", "!0r,!1r,!2d,!3D", 2),
+ "ext", "!0r,!1r,!2d,!3D", 4),
#endif
ENCODING_MAP(kMipsJal, 0x0c000000,
kFmtBitBlt, 25, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR,
- "jal", "!0T(!0E)", 2),
+ "jal", "!0T(!0E)", 4),
ENCODING_MAP(kMipsJalr, 0x00000009,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF0_USE1,
- "jalr", "!0r,!1r", 2),
+ "jalr", "!0r,!1r", 4),
ENCODING_MAP(kMipsJr, 0x00000008,
kFmtBitBlt, 25, 21, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
- "jr", "!0r", 2),
+ "jr", "!0r", 4),
ENCODING_MAP(kMipsLahi, 0x3C000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0,
- "lahi/lui", "!0r,0x!1h(!1d)", 2),
+ "lahi/lui", "!0r,0x!1h(!1d)", 4),
ENCODING_MAP(kMipsLalo, 0x34000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "lalo/ori", "!0r,!1r,0x!2h(!2d)", 2),
+ "lalo/ori", "!0r,!1r,0x!2h(!2d)", 4),
ENCODING_MAP(kMipsLui, 0x3C000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0,
- "lui", "!0r,0x!1h(!1d)", 2),
+ "lui", "!0r,0x!1h(!1d)", 4),
ENCODING_MAP(kMipsLb, 0x80000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
- "lb", "!0r,!1d(!2r)", 2),
+ "lb", "!0r,!1d(!2r)", 4),
ENCODING_MAP(kMipsLbu, 0x90000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
- "lbu", "!0r,!1d(!2r)", 2),
+ "lbu", "!0r,!1d(!2r)", 4),
ENCODING_MAP(kMipsLh, 0x84000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
- "lh", "!0r,!1d(!2r)", 2),
+ "lh", "!0r,!1d(!2r)", 4),
ENCODING_MAP(kMipsLhu, 0x94000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
- "lhu", "!0r,!1d(!2r)", 2),
+ "lhu", "!0r,!1d(!2r)", 4),
ENCODING_MAP(kMipsLw, 0x8C000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
- "lw", "!0r,!1d(!2r)", 2),
+ "lw", "!0r,!1d(!2r)", 4),
ENCODING_MAP(kMipsMfhi, 0x00000010,
kFmtBitBlt, 15, 11, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "mfhi", "!0r", 2),
+ "mfhi", "!0r", 4),
ENCODING_MAP(kMipsMflo, 0x00000012,
kFmtBitBlt, 15, 11, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "mflo", "!0r", 2),
+ "mflo", "!0r", 4),
ENCODING_MAP(kMipsMove, 0x00000025, /* or using zero reg */
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "move", "!0r,!1r", 2),
+ "move", "!0r,!1r", 4),
ENCODING_MAP(kMipsMovz, 0x0000000a,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "movz", "!0r,!1r,!2r", 2),
+ "movz", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsMul, 0x70000002,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "mul", "!0r,!1r,!2r", 2),
+ "mul", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsNop, 0x00000000,
kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, NO_OPERAND,
- "nop", "", 2),
+ "nop", "", 4),
ENCODING_MAP(kMipsNor, 0x00000027, /* used for "not" too */
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "nor", "!0r,!1r,!2r", 2),
+ "nor", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsOr, 0x00000025,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "or", "!0r,!1r,!2r", 2),
+ "or", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsOri, 0x34000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "ori", "!0r,!1r,0x!2h(!2d)", 2),
+ "ori", "!0r,!1r,0x!2h(!2d)", 4),
ENCODING_MAP(kMipsPref, 0xCC000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE2,
- "pref", "!0d,!1d(!2r)", 2),
+ "pref", "!0d,!1d(!2r)", 4),
ENCODING_MAP(kMipsSb, 0xA0000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE02 | IS_STORE,
- "sb", "!0r,!1d(!2r)", 2),
+ "sb", "!0r,!1d(!2r)", 4),
#if __mips_isa_rev>=2
ENCODING_MAP(kMipsSeb, 0x7c000420,
kFmtBitBlt, 15, 11, kFmtBitBlt, 20, 16, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "seb", "!0r,!1r", 2),
+ "seb", "!0r,!1r", 4),
ENCODING_MAP(kMipsSeh, 0x7c000620,
kFmtBitBlt, 15, 11, kFmtBitBlt, 20, 16, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "seh", "!0r,!1r", 2),
+ "seh", "!0r,!1r", 4),
#endif
ENCODING_MAP(kMipsSh, 0xA4000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE02 | IS_STORE,
- "sh", "!0r,!1d(!2r)", 2),
+ "sh", "!0r,!1d(!2r)", 4),
ENCODING_MAP(kMipsSll, 0x00000000,
kFmtBitBlt, 15, 11, kFmtBitBlt, 20, 16, kFmtBitBlt, 10, 6,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "sll", "!0r,!1r,0x!2h(!2d)", 2),
+ "sll", "!0r,!1r,0x!2h(!2d)", 4),
ENCODING_MAP(kMipsSllv, 0x00000004,
kFmtBitBlt, 15, 11, kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "sllv", "!0r,!1r,!2r", 2),
+ "sllv", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsSlt, 0x0000002a,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "slt", "!0r,!1r,!2r", 2),
+ "slt", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsSlti, 0x28000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "slti", "!0r,!1r,0x!2h(!2d)", 2),
+ "slti", "!0r,!1r,0x!2h(!2d)", 4),
ENCODING_MAP(kMipsSltu, 0x0000002b,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "sltu", "!0r,!1r,!2r", 2),
+ "sltu", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsSra, 0x00000003,
kFmtBitBlt, 15, 11, kFmtBitBlt, 20, 16, kFmtBitBlt, 10, 6,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "sra", "!0r,!1r,0x!2h(!2d)", 2),
+ "sra", "!0r,!1r,0x!2h(!2d)", 4),
ENCODING_MAP(kMipsSrav, 0x00000007,
kFmtBitBlt, 15, 11, kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "srav", "!0r,!1r,!2r", 2),
+ "srav", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsSrl, 0x00000002,
kFmtBitBlt, 15, 11, kFmtBitBlt, 20, 16, kFmtBitBlt, 10, 6,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "srl", "!0r,!1r,0x!2h(!2d)", 2),
+ "srl", "!0r,!1r,0x!2h(!2d)", 4),
ENCODING_MAP(kMipsSrlv, 0x00000006,
kFmtBitBlt, 15, 11, kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "srlv", "!0r,!1r,!2r", 2),
+ "srlv", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsSubu, 0x00000023, /* used for "neg" too */
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "subu", "!0r,!1r,!2r", 2),
+ "subu", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsSw, 0xAC000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE02 | IS_STORE,
- "sw", "!0r,!1d(!2r)", 2),
+ "sw", "!0r,!1d(!2r)", 4),
ENCODING_MAP(kMipsXor, 0x00000026,
kFmtBitBlt, 15, 11, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "xor", "!0r,!1r,!2r", 2),
+ "xor", "!0r,!1r,!2r", 4),
ENCODING_MAP(kMipsXori, 0x38000000,
kFmtBitBlt, 20, 16, kFmtBitBlt, 25, 21, kFmtBitBlt, 15, 0,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1,
- "xori", "!0r,!1r,0x!2h(!2d)", 2),
+ "xori", "!0r,!1r,0x!2h(!2d)", 4),
#ifdef __mips_hard_float
ENCODING_MAP(kMipsFadds, 0x46000000,
kFmtSfp, 10, 6, kFmtSfp, 15, 11, kFmtSfp, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "add.s", "!0s,!1s,!2s", 2),
+ "add.s", "!0s,!1s,!2s", 4),
ENCODING_MAP(kMipsFsubs, 0x46000001,
kFmtSfp, 10, 6, kFmtSfp, 15, 11, kFmtSfp, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "sub.s", "!0s,!1s,!2s", 2),
+ "sub.s", "!0s,!1s,!2s", 4),
ENCODING_MAP(kMipsFmuls, 0x46000002,
kFmtSfp, 10, 6, kFmtSfp, 15, 11, kFmtSfp, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "mul.s", "!0s,!1s,!2s", 2),
+ "mul.s", "!0s,!1s,!2s", 4),
ENCODING_MAP(kMipsFdivs, 0x46000003,
kFmtSfp, 10, 6, kFmtSfp, 15, 11, kFmtSfp, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "div.s", "!0s,!1s,!2s", 2),
+ "div.s", "!0s,!1s,!2s", 4),
ENCODING_MAP(kMipsFaddd, 0x46200000,
kFmtDfp, 10, 6, kFmtDfp, 15, 11, kFmtDfp, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "add.d", "!0S,!1S,!2S", 2),
+ "add.d", "!0S,!1S,!2S", 4),
ENCODING_MAP(kMipsFsubd, 0x46200001,
kFmtDfp, 10, 6, kFmtDfp, 15, 11, kFmtDfp, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "sub.d", "!0S,!1S,!2S", 2),
+ "sub.d", "!0S,!1S,!2S", 4),
ENCODING_MAP(kMipsFmuld, 0x46200002,
kFmtDfp, 10, 6, kFmtDfp, 15, 11, kFmtDfp, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "mul.d", "!0S,!1S,!2S", 2),
+ "mul.d", "!0S,!1S,!2S", 4),
ENCODING_MAP(kMipsFdivd, 0x46200003,
kFmtDfp, 10, 6, kFmtDfp, 15, 11, kFmtDfp, 20, 16,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12,
- "div.d", "!0S,!1S,!2S", 2),
+ "div.d", "!0S,!1S,!2S", 4),
ENCODING_MAP(kMipsFcvtsd, 0x46200020,
kFmtSfp, 10, 6, kFmtDfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "cvt.s.d", "!0s,!1S", 2),
+ "cvt.s.d", "!0s,!1S", 4),
ENCODING_MAP(kMipsFcvtsw, 0x46800020,
kFmtSfp, 10, 6, kFmtSfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "cvt.s.w", "!0s,!1s", 2),
+ "cvt.s.w", "!0s,!1s", 4),
ENCODING_MAP(kMipsFcvtds, 0x46000021,
kFmtDfp, 10, 6, kFmtSfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "cvt.d.s", "!0S,!1s", 2),
+ "cvt.d.s", "!0S,!1s", 4),
ENCODING_MAP(kMipsFcvtdw, 0x46800021,
kFmtDfp, 10, 6, kFmtSfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "cvt.d.w", "!0S,!1s", 2),
+ "cvt.d.w", "!0S,!1s", 4),
ENCODING_MAP(kMipsFcvtws, 0x46000024,
kFmtSfp, 10, 6, kFmtSfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "cvt.w.s", "!0s,!1s", 2),
+ "cvt.w.s", "!0s,!1s", 4),
ENCODING_MAP(kMipsFcvtwd, 0x46200024,
kFmtSfp, 10, 6, kFmtDfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "cvt.w.d", "!0s,!1S", 2),
+ "cvt.w.d", "!0s,!1S", 4),
ENCODING_MAP(kMipsFmovs, 0x46000006,
kFmtSfp, 10, 6, kFmtSfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "mov.s", "!0s,!1s", 2),
+ "mov.s", "!0s,!1s", 4),
ENCODING_MAP(kMipsFmovd, 0x46200006,
kFmtDfp, 10, 6, kFmtDfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "mov.d", "!0S,!1S", 2),
+ "mov.d", "!0S,!1S", 4),
ENCODING_MAP(kMipsFlwc1, 0xC4000000,
kFmtSfp, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
- "lwc1", "!0s,!1d(!2r)", 2),
+ "lwc1", "!0s,!1d(!2r)", 4),
ENCODING_MAP(kMipsFldc1, 0xD4000000,
kFmtDfp, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
- "ldc1", "!0S,!1d(!2r)", 2),
+ "ldc1", "!0S,!1d(!2r)", 4),
ENCODING_MAP(kMipsFswc1, 0xE4000000,
kFmtSfp, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE02 | IS_STORE,
- "swc1", "!0s,!1d(!2r)", 2),
+ "swc1", "!0s,!1d(!2r)", 4),
ENCODING_MAP(kMipsFsdc1, 0xF4000000,
kFmtDfp, 20, 16, kFmtBitBlt, 15, 0, kFmtBitBlt, 25, 21,
kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE02 | IS_STORE,
- "sdc1", "!0S,!1d(!2r)", 2),
+ "sdc1", "!0S,!1d(!2r)", 4),
ENCODING_MAP(kMipsMfc1, 0x44000000,
kFmtBitBlt, 20, 16, kFmtSfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0_USE1,
- "mfc1", "!0r,!1s", 2),
+ "mfc1", "!0r,!1s", 4),
ENCODING_MAP(kMipsMtc1, 0x44800000,
kFmtBitBlt, 20, 16, kFmtSfp, 15, 11, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | REG_DEF1,
- "mtc1", "!0r,!1s", 2),
+ "mtc1", "!0r,!1s", 4),
#endif
ENCODING_MAP(kMipsUndefined, 0x64000000,
kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1,
kFmtUnused, -1, -1, NO_OPERAND,
- "undefined", "", 2),
+ "undefined", "", 4),
};
/*
@@ -544,7 +544,7 @@
mipsLIR->offset = offset;
if (mipsLIR->opcode >= 0) {
if (!mipsLIR->flags.isNop) {
- mipsLIR->flags.size = EncodingMap[mipsLIR->opcode].size * 2;
+ mipsLIR->flags.size = EncodingMap[mipsLIR->opcode].size;
offset += mipsLIR->flags.size;
}
} else if (mipsLIR->opcode == kPseudoPseudoAlign4) {
diff --git a/src/compiler/codegen/mips/Mips32/Factory.cc b/src/compiler/codegen/mips/Mips32/Factory.cc
index 71220c0..2613f2c 100644
--- a/src/compiler/codegen/mips/Mips32/Factory.cc
+++ b/src/compiler/codegen/mips/Mips32/Factory.cc
@@ -41,8 +41,6 @@
void genBarrier(CompilationUnit *cUnit);
LIR* genCompareBranch(CompilationUnit* cUnit, ConditionCode cond, int src1,
int src2);
-LIR* opCompareBranch(CompilationUnit* cUnit, MipsOpCode opc, int src1,
- int src2);
void storePair(CompilationUnit *cUnit, int base, int lowReg,
int highReg);
void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg);
@@ -789,68 +787,16 @@
return storeBaseDispBody(cUnit, rBase, displacement, rSrcLo, rSrcHi, kLong);
}
+void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg)
+{
+ storeWordDisp(cUnit, base, LOWORD_OFFSET, lowReg);
+ storeWordDisp(cUnit, base, HIWORD_OFFSET, highReg);
+}
+
void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg)
{
loadWordDisp(cUnit, base, LOWORD_OFFSET , lowReg);
loadWordDisp(cUnit, base, HIWORD_OFFSET , highReg);
}
-LIR *genRegImmCheck(CompilationUnit *cUnit,
- MipsConditionCode cond, int reg,
- int checkValue, int dOffset,
- LIR *pcrLabel)
-{
- LIR *branch = NULL;
-
- if (checkValue == 0) {
- MipsOpCode opc = kMipsNop;
- if (cond == kMipsCondEq) {
- opc = kMipsBeqz;
- } else if (cond == kMipsCondNe) {
- opc = kMipsBnez;
- } else if (cond == kMipsCondLt || cond == kMipsCondMi) {
- opc = kMipsBltz;
- } else if (cond == kMipsCondLe) {
- opc = kMipsBlez;
- } else if (cond == kMipsCondGt) {
- opc = kMipsBgtz;
- } else if (cond == kMipsCondGe) {
- opc = kMipsBgez;
- } else {
- LOG(FATAL) << "Bad case in genRegImmCheck";
- }
- branch = opCompareBranch(cUnit, opc, reg, -1);
- } else if (IS_SIMM16(checkValue)) {
- if (cond == kMipsCondLt) {
- int tReg = oatAllocTemp(cUnit);
- newLIR3(cUnit, kMipsSlti, tReg, reg, checkValue);
- branch = opCompareBranch(cUnit, kMipsBne, tReg, r_ZERO);
- oatFreeTemp(cUnit, tReg);
- } else {
- LOG(FATAL) << "Bad case in genRegImmCheck";
- }
- } else {
- LOG(FATAL) << "Bad case in genRegImmCheck";
- }
-
- UNIMPLEMENTED(FATAL) << "Needs art conversion";
- return NULL;
-#if 0
- if (cUnit->jitMode == kJitMethod) {
- BasicBlock *bb = cUnit->curBlock;
- if (bb->taken) {
- LIR *exceptionLabel = (LIR *) cUnit->blockLabelList;
- exceptionLabel += bb->taken->id;
- branch->target = (LIR *) exceptionLabel;
- return exceptionLabel;
- } else {
- LOG(FATAL) << "Catch blocks not handled yet";
- return NULL;
- }
- } else {
- return genCheckCommon(cUnit, dOffset, branch, pcrLabel);
- }
-#endif
-}
-
} // namespace art
diff --git a/src/compiler/codegen/mips/Mips32/Gen.cc b/src/compiler/codegen/mips/Mips32/Gen.cc
index 0b2b15a..942dbc5 100644
--- a/src/compiler/codegen/mips/Mips32/Gen.cc
+++ b/src/compiler/codegen/mips/Mips32/Gen.cc
@@ -184,6 +184,27 @@
#endif
}
+void genNegFloat(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc)
+{
+ RegLocation rlResult;
+ rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
+ rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ opRegRegImm(cUnit, kOpAdd, rlResult.lowReg,
+ rlSrc.lowReg, 0x80000000);
+ storeValue(cUnit, rlDest, rlResult);
+}
+
+void genNegDouble(CompilationUnit *cUnit, RegLocation rlDest, RegLocation rlSrc)
+{
+ RegLocation rlResult;
+ rlSrc = loadValueWide(cUnit, rlSrc, kCoreReg);
+ rlResult = oatEvalLoc(cUnit, rlDest, kCoreReg, true);
+ opRegRegImm(cUnit, kOpAdd, rlResult.highReg, rlSrc.highReg,
+ 0x80000000);
+ genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg);
+ storeValueWide(cUnit, rlDest, rlResult);
+}
+
/*
* TODO: implement fast path to short-circuit thin-lock case
*/
diff --git a/src/compiler/codegen/mips/MipsLIR.h b/src/compiler/codegen/mips/MipsLIR.h
index 93956d5..9baa3c0 100644
--- a/src/compiler/codegen/mips/MipsLIR.h
+++ b/src/compiler/codegen/mips/MipsLIR.h
@@ -547,7 +547,7 @@
int flags;
const char *name;
const char* fmt;
- int size;
+ int size; /* Size in bytes */
} MipsEncodingMap;
/* Keys for target-specific scheduling and other optimization hints */
diff --git a/src/compiler/codegen/mips/mips/ArchVariant.cc b/src/compiler/codegen/mips/mips/ArchVariant.cc
index dd46f24..32b50e9 100644
--- a/src/compiler/codegen/mips/mips/ArchVariant.cc
+++ b/src/compiler/codegen/mips/mips/ArchVariant.cc
@@ -49,7 +49,7 @@
return res;
}
-void dvmCompilerGenMemBarrier(CompilationUnit *cUnit, int barrierKind)
+void oatGenMemBarrier(CompilationUnit *cUnit, int barrierKind)
{
#if ANDROID_SMP != 0
// FIXME: what to do here for Mips?