Introduce a Marking Register in ARM code generation.
When generating code for ARM, maintain the status of
Thread::Current()->GetIsGcMarking() in register R8,
dubbed MR (Marking Register), and check the value of that
register (instead of loading and checking a read barrier
marking entrypoint) in read barriers.
Test: m test-art-target
Test: m test-art-target with tree built with ART_USE_READ_BARRIER=false
Test: m test-art-host-gtest
Test: ARM device boot test
Bug: 37707231
Change-Id: I30b44254460d0bbb9f1b2adc65eca52ca3de3f53
diff --git a/runtime/common_runtime_test.h b/runtime/common_runtime_test.h
index 5893573..fcf3a31 100644
--- a/runtime/common_runtime_test.h
+++ b/runtime/common_runtime_test.h
@@ -247,6 +247,12 @@
return; \
}
+#define TEST_DISABLED_WITHOUT_BAKER_READ_BARRIERS() \
+ if (!kEmitCompilerReadBarrier || !kUseBakerReadBarrier) { \
+ printf("WARNING: TEST DISABLED FOR GC WITHOUT BAKER READ BARRIER\n"); \
+ return; \
+ }
+
#define TEST_DISABLED_FOR_NON_STATIC_HOST_BUILDS() \
if (!kHostStaticBuildEnabled) { \
printf("WARNING: TEST DISABLED FOR NON-STATIC HOST BUILDS\n"); \