commit 6a58cb16d803c9a7b3a75ccac8be19dd9d4e520d
author Dmitry Petrochenko <dmitry.petrochenko@intel.com> Wed Apr 02 17:27:59 2014 +0700
committer Dmitry Petrochenko <dmitry.petrochenko@intel.com> Thu Apr 03 13:06:55 2014 +0700
tree c142777f40178fd9b9090cd7316be694befb3f21
parent 8549cf9d83688f7decbbea2a8de761ce29e95f3c

art: Handle x86_64 architecture equal to x86

This patch forces FE/ME to treat x86_64 as x86 exactly.
The x86_64 logic will be revised later when assembly will be ready.

Change-Id: I4a92477a6eeaa9a11fd710d35c602d8d6f88cbb6
Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>

compiler/dex/quick/x86/int_x86.cc

diff --git a/compiler/dex/quick/x86/int_x86.cc b/compiler/dex/quick/x86/int_x86.cc
index 4310d6e..bbcedc3 100644
--- a/compiler/dex/quick/x86/int_x86.cc
+++ b/compiler/dex/quick/x86/int_x86.cc
@@ -663,7 +663,7 @@
 }
 
 bool X86Mir2Lir::GenInlinedMinMaxInt(CallInfo* info, bool is_min) {
-  DCHECK_EQ(cu_->instruction_set, kX86);
+  DCHECK(cu_->instruction_set == kX86 || cu_->instruction_set == kX86_64);
 
   // Get the two arguments to the invoke and place them in GP registers.
   RegLocation rl_src1 = info->args[0];
@@ -751,7 +751,7 @@
 }
 
 bool X86Mir2Lir::GenInlinedCas(CallInfo* info, bool is_long, bool is_object) {
-  DCHECK_EQ(cu_->instruction_set, kX86);
+  DCHECK(cu_->instruction_set == kX86 || cu_->instruction_set == kX86_64);
   // Unused - RegLocation rl_src_unsafe = info->args[0];
   RegLocation rl_src_obj = info->args[1];  // Object - known non-null
   RegLocation rl_src_offset = info->args[2];  // long low