ART: Fix comments for dmb

Update the comments to mention correct barrier type.

Bug: 14680557
Change-Id: I26df43078c189cf16cc65e99b851981cbd063017
diff --git a/runtime/arch/arm/quick_entrypoints_arm.S b/runtime/arch/arm/quick_entrypoints_arm.S
index 4886561..5212576 100644
--- a/runtime/arch/arm/quick_entrypoints_arm.S
+++ b/runtime/arch/arm/quick_entrypoints_arm.S
@@ -399,7 +399,7 @@
     @ unlocked case - r2 holds thread id with count of 0
     strex  r3, r2, [r0, #LOCK_WORD_OFFSET]
     cbnz   r3, .Lstrex_fail           @ store failed, retry
-    dmb    ish                        @ full (LoadLoad) memory barrier
+    dmb    ish                        @ full (LoadLoad|LoadStore) memory barrier
     bx lr
 .Lstrex_fail:
     b .Lretry_lock                    @ unlikely forward branch, need to reload and recheck r1/r2
@@ -442,7 +442,7 @@
     cmp    r1, #65536
     bpl    .Lrecursive_thin_unlock
     @ transition to unlocked, r3 holds 0
-    dmb    ish                        @ full (StoreLoad) memory barrier
+    dmb    ish                        @ full (LoadStore|StoreStore) memory barrier
     str    r3, [r0, #LOCK_WORD_OFFSET]
     bx     lr
 .Lrecursive_thin_unlock:
diff --git a/runtime/arch/arm64/quick_entrypoints_arm64.S b/runtime/arch/arm64/quick_entrypoints_arm64.S
index 2a21144..3b027f9 100644
--- a/runtime/arch/arm64/quick_entrypoints_arm64.S
+++ b/runtime/arch/arm64/quick_entrypoints_arm64.S
@@ -1014,7 +1014,7 @@
     cbnz   w1, .Lnot_unlocked         // already thin locked
     stxr   w3, w2, [x4]
     cbnz   w3, .Lstrex_fail           // store failed, retry
-    dmb    ishld                      // full (LoadLoad) memory barrier, TODO: acquire-release
+    dmb    ishld                      // full (LoadLoad|LoadStore) memory barrier
     ret
 .Lstrex_fail:
     b .Lretry_lock                    // unlikely forward branch, need to reload and recheck r1/r2
@@ -1058,7 +1058,7 @@
     cmp    w1, #65536
     bpl    .Lrecursive_thin_unlock
     // transition to unlocked, w3 holds 0
-    dmb    ish                        // full (StoreLoad) memory barrier
+    dmb    ish                        // full (LoadStore|StoreStore) memory barrier
     str    w3, [x0, #LOCK_WORD_OFFSET]
     ret
 .Lrecursive_thin_unlock: