MIPS32R2: Fix MethodLoadKind::kBootImageLinkTimePcRelative
This makes MIPS32 boot again.
The issue was introduced in commit
6597946d29be9108e2cc51223553d3db9290a3d9:
Static invokes in slow paths would sometimes get
HMipsComputeBaseMethodAddress from the stack into the
same register where the art method pointer would later
be loaded (A0) with the former being overwritten in the
process of loading the latter.
Test: booted MIPS32R2 in QEMU
Change-Id: Ib584cf66795574175650f42b191c797fb3b3965f
diff --git a/compiler/optimizing/code_generator_mips.cc b/compiler/optimizing/code_generator_mips.cc
index d8ac99a..1978534 100644
--- a/compiler/optimizing/code_generator_mips.cc
+++ b/compiler/optimizing/code_generator_mips.cc
@@ -1674,6 +1674,7 @@
void CodeGeneratorMIPS::EmitPcRelativeAddressPlaceholderHigh(PcRelativePatchInfo* info,
Register out,
Register base) {
+ DCHECK_NE(out, base);
if (GetInstructionSetFeatures().IsR6()) {
DCHECK_EQ(base, ZERO);
__ Bind(&info->high_label);
@@ -7139,8 +7140,8 @@
PcRelativePatchInfo* info = NewPcRelativeMethodPatch(invoke->GetTargetMethod());
bool reordering = __ SetReorder(false);
Register temp_reg = temp.AsRegister<Register>();
- EmitPcRelativeAddressPlaceholderHigh(info, temp_reg, base_reg);
- __ Addiu(temp_reg, temp_reg, /* placeholder */ 0x5678);
+ EmitPcRelativeAddressPlaceholderHigh(info, TMP, base_reg);
+ __ Addiu(temp_reg, TMP, /* placeholder */ 0x5678);
__ SetReorder(reordering);
break;
}