commit 59dd25827bdadeffdeeb23817259a58e7b55e12e
author Lifang Xia <lifang_xia@linux.alibaba.com> Wed Jun 07 16:00:36 2023 +0800
committer Treehugger Robot <android-test-infra-autosubmit@system.gserviceaccount.com> Wed Jun 28 17:56:28 2023 +0000
tree 4a24a32f3701da49e1c19770a214f8410f702220
parent 7396ac0c613253f41fed79d3a53f9c33e754e52d

RISCV: Add assembler in Codegen.

Test: m test-art-host-gtest
Bug: 283082089
Change-Id: I5bc778aca01bff282b1e2b865ef9b09fab8d348b

compiler/optimizing/code_generator_riscv64.cc

diff --git a/compiler/optimizing/code_generator_riscv64.cc b/compiler/optimizing/code_generator_riscv64.cc
index e01c7c9..1c0fc0a 100644
--- a/compiler/optimizing/code_generator_riscv64.cc
+++ b/compiler/optimizing/code_generator_riscv64.cc
@@ -70,7 +70,9 @@
                     ComputeRegisterMask(kFpuCalleeSaves, arraysize(kFpuCalleeSaves)),
                     compiler_options,
                     stats,
-                    ArrayRef<const bool>(detail::kIsIntrinsicUnimplemented)) {
+                    ArrayRef<const bool>(detail::kIsIntrinsicUnimplemented)),
+      assembler_(graph->GetAllocator(),
+                 compiler_options.GetInstructionSetFeatures()->AsRiscv64InstructionSetFeatures()) {
   LOG(FATAL) << "Unimplemented";
 }
 

compiler/optimizing/code_generator_riscv64.h

diff --git a/compiler/optimizing/code_generator_riscv64.h b/compiler/optimizing/code_generator_riscv64.h
index 4ef008a..b6f5908 100644
--- a/compiler/optimizing/code_generator_riscv64.h
+++ b/compiler/optimizing/code_generator_riscv64.h
@@ -98,14 +98,9 @@
     LOG(FATAL) << "unimplemented";
     UNREACHABLE();
   }
-  Riscv64Assembler* GetAssembler() override {
-    LOG(FATAL) << "Unimplemented";
-    UNREACHABLE();
-  }
-  const Riscv64Assembler& GetAssembler() const override {
-    LOG(FATAL) << "Unimplemented";
-    UNREACHABLE();
-  }
+
+  Riscv64Assembler* GetAssembler() override { return &assembler_; }
+  const Riscv64Assembler& GetAssembler() const override { return assembler_; }
 
   HGraphVisitor* GetLocationBuilder() override {
     LOG(FATAL) << "Unimplemented";
@@ -182,6 +177,9 @@
                            Location temp,
                            SlowPathCode* slow_path = nullptr) override;
   void MoveFromReturnRegister(Location trg, DataType::Type type) override;
+
+ private:
+  Riscv64Assembler assembler_;
 };
 
 }  // namespace riscv64