commit 58d25fd052e999a24734b0cf856a1563e3d1b2d0
author Mark Mendell <mark.p.mendell@intel.com> Fri Apr 03 14:52:31 2015 -0400
committer Mark Mendell <mark.p.mendell@intel.com> Mon Apr 06 23:05:13 2015 -0400
tree b1dbeae13a24e3f7ec325698a3724b5d90df2ef9
parent 1b8e8cac2c96f6d2af8e7217f997a30e11c098b5

[optimizing] Implement more x86/x86_64 intrinsics

Implement CAS and bit reverse and byte reverse intrinsics that were
missing from x86 and x86_64 implementations.

Add assembler tests and compareAndSwapLong test.

Change-Id: Iabb2ff46036645df0a91f640288ef06090a64ee3
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>

compiler/utils/x86_64/assembler_x86_64.h

diff --git a/compiler/utils/x86_64/assembler_x86_64.h b/compiler/utils/x86_64/assembler_x86_64.h
index 39f781c..3b4fbb5 100644
--- a/compiler/utils/x86_64/assembler_x86_64.h
+++ b/compiler/utils/x86_64/assembler_x86_64.h
@@ -517,6 +517,7 @@
 
   X86_64Assembler* lock();
   void cmpxchgl(const Address& address, CpuRegister reg);
+  void cmpxchgq(const Address& address, CpuRegister reg);
 
   void mfence();
 
@@ -539,6 +540,10 @@
     lock()->cmpxchgl(address, reg);
   }
 
+  void LockCmpxchgq(const Address& address, CpuRegister reg) {
+    lock()->cmpxchgq(address, reg);
+  }
+
   //
   // Misc. functionality
   //