Delete unused blocked_register_pairs_ in code generators
Legacy code for compatibility with quick?
Test: test-art-host CC
Change-Id: I9de261daea67dfd9bd3df89826ba9d10f135e29e
diff --git a/compiler/optimizing/code_generator.h b/compiler/optimizing/code_generator.h
index 49f4f18..a81f24e 100644
--- a/compiler/optimizing/code_generator.h
+++ b/compiler/optimizing/code_generator.h
@@ -560,8 +560,6 @@
kArenaAllocCodeGenerator)),
blocked_fpu_registers_(graph->GetArena()->AllocArray<bool>(number_of_fpu_registers,
kArenaAllocCodeGenerator)),
- blocked_register_pairs_(graph->GetArena()->AllocArray<bool>(number_of_register_pairs,
- kArenaAllocCodeGenerator)),
number_of_core_registers_(number_of_core_registers),
number_of_fpu_registers_(number_of_fpu_registers),
number_of_register_pairs_(number_of_register_pairs),
@@ -649,7 +647,6 @@
// arrays.
bool* const blocked_core_registers_;
bool* const blocked_fpu_registers_;
- bool* const blocked_register_pairs_;
size_t number_of_core_registers_;
size_t number_of_fpu_registers_;
size_t number_of_register_pairs_;
diff --git a/compiler/optimizing/code_generator_arm.cc b/compiler/optimizing/code_generator_arm.cc
index 77d6f23..00530d8 100644
--- a/compiler/optimizing/code_generator_arm.cc
+++ b/compiler/optimizing/code_generator_arm.cc
@@ -1031,9 +1031,6 @@
}
void CodeGeneratorARM::SetupBlockedRegisters() const {
- // Don't allocate the dalvik style register pair passing.
- blocked_register_pairs_[R1_R2] = true;
-
// Stack register, LR and PC are always reserved.
blocked_core_registers_[SP] = true;
blocked_core_registers_[LR] = true;
@@ -1053,19 +1050,6 @@
blocked_fpu_registers_[kFpuCalleeSaves[i]] = true;
}
}
-
- UpdateBlockedPairRegisters();
-}
-
-void CodeGeneratorARM::UpdateBlockedPairRegisters() const {
- for (int i = 0; i < kNumberOfRegisterPairs; i++) {
- ArmManagedRegister current =
- ArmManagedRegister::FromRegisterPair(static_cast<RegisterPair>(i));
- if (blocked_core_registers_[current.AsRegisterPairLow()]
- || blocked_core_registers_[current.AsRegisterPairHigh()]) {
- blocked_register_pairs_[i] = true;
- }
- }
}
InstructionCodeGeneratorARM::InstructionCodeGeneratorARM(HGraph* graph, CodeGeneratorARM* codegen)
diff --git a/compiler/optimizing/code_generator_arm.h b/compiler/optimizing/code_generator_arm.h
index ef2e23f..4d59b47 100644
--- a/compiler/optimizing/code_generator_arm.h
+++ b/compiler/optimizing/code_generator_arm.h
@@ -365,9 +365,6 @@
void DumpCoreRegister(std::ostream& stream, int reg) const OVERRIDE;
void DumpFloatingPointRegister(std::ostream& stream, int reg) const OVERRIDE;
- // Blocks all register pairs made out of blocked core registers.
- void UpdateBlockedPairRegisters() const;
-
ParallelMoveResolverARM* GetMoveResolver() OVERRIDE {
return &move_resolver_;
}
diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc
index 226f109..b522e48 100644
--- a/compiler/optimizing/code_generator_arm_vixl.cc
+++ b/compiler/optimizing/code_generator_arm_vixl.cc
@@ -211,9 +211,6 @@
}
void CodeGeneratorARMVIXL::SetupBlockedRegisters() const {
- // Don't allocate the dalvik style register pair passing.
- blocked_register_pairs_[R1_R2] = true;
-
// Stack register, LR and PC are always reserved.
blocked_core_registers_[SP] = true;
blocked_core_registers_[LR] = true;
@@ -235,20 +232,6 @@
blocked_fpu_registers_[i] = true;
}
}
-
- UpdateBlockedPairRegisters();
-}
-
-// Blocks all register pairs containing blocked core registers.
-void CodeGeneratorARMVIXL::UpdateBlockedPairRegisters() const {
- for (int i = 0; i < kNumberOfRegisterPairs; i++) {
- ArmManagedRegister current =
- ArmManagedRegister::FromRegisterPair(static_cast<RegisterPair>(i));
- if (blocked_core_registers_[current.AsRegisterPairLow()]
- || blocked_core_registers_[current.AsRegisterPairHigh()]) {
- blocked_register_pairs_[i] = true;
- }
- }
}
void InstructionCodeGeneratorARMVIXL::GenerateSuspendCheck(HSuspendCheck* instruction,
diff --git a/compiler/optimizing/code_generator_arm_vixl.h b/compiler/optimizing/code_generator_arm_vixl.h
index 7b7118c..3991346 100644
--- a/compiler/optimizing/code_generator_arm_vixl.h
+++ b/compiler/optimizing/code_generator_arm_vixl.h
@@ -284,9 +284,6 @@
void Finalize(CodeAllocator* allocator) OVERRIDE;
void SetupBlockedRegisters() const OVERRIDE;
- // Blocks all register pairs made out of blocked core registers.
- void UpdateBlockedPairRegisters() const;
-
void DumpCoreRegister(std::ostream& stream, int reg) const OVERRIDE;
void DumpFloatingPointRegister(std::ostream& stream, int reg) const OVERRIDE;
diff --git a/compiler/optimizing/code_generator_mips.cc b/compiler/optimizing/code_generator_mips.cc
index e336df8..bab702a 100644
--- a/compiler/optimizing/code_generator_mips.cc
+++ b/compiler/optimizing/code_generator_mips.cc
@@ -1168,9 +1168,6 @@
}
void CodeGeneratorMIPS::SetupBlockedRegisters() const {
- // Don't allocate the dalvik style register pair passing.
- blocked_register_pairs_[A1_A2] = true;
-
// ZERO, K0, K1, GP, SP, RA are always reserved and can't be allocated.
blocked_core_registers_[ZERO] = true;
blocked_core_registers_[K0] = true;
@@ -1205,19 +1202,6 @@
blocked_fpu_registers_[kFpuCalleeSaves[i]] = true;
}
}
-
- UpdateBlockedPairRegisters();
-}
-
-void CodeGeneratorMIPS::UpdateBlockedPairRegisters() const {
- for (int i = 0; i < kNumberOfRegisterPairs; i++) {
- MipsManagedRegister current =
- MipsManagedRegister::FromRegisterPair(static_cast<RegisterPair>(i));
- if (blocked_core_registers_[current.AsRegisterPairLow()]
- || blocked_core_registers_[current.AsRegisterPairHigh()]) {
- blocked_register_pairs_[i] = true;
- }
- }
}
size_t CodeGeneratorMIPS::SaveCoreRegister(size_t stack_index, uint32_t reg_id) {
diff --git a/compiler/optimizing/code_generator_mips.h b/compiler/optimizing/code_generator_mips.h
index 0e8d8d4..b8bd96a 100644
--- a/compiler/optimizing/code_generator_mips.h
+++ b/compiler/optimizing/code_generator_mips.h
@@ -342,9 +342,6 @@
void DumpCoreRegister(std::ostream& stream, int reg) const OVERRIDE;
void DumpFloatingPointRegister(std::ostream& stream, int reg) const OVERRIDE;
- // Blocks all register pairs made out of blocked core registers.
- void UpdateBlockedPairRegisters() const;
-
InstructionSet GetInstructionSet() const OVERRIDE { return InstructionSet::kMips; }
const MipsInstructionSetFeatures& GetInstructionSetFeatures() const {
diff --git a/compiler/optimizing/code_generator_x86.cc b/compiler/optimizing/code_generator_x86.cc
index 960f01c..e74e605 100644
--- a/compiler/optimizing/code_generator_x86.cc
+++ b/compiler/optimizing/code_generator_x86.cc
@@ -841,24 +841,8 @@
}
void CodeGeneratorX86::SetupBlockedRegisters() const {
- // Don't allocate the dalvik style register pair passing.
- blocked_register_pairs_[ECX_EDX] = true;
-
// Stack register is always reserved.
blocked_core_registers_[ESP] = true;
-
- UpdateBlockedPairRegisters();
-}
-
-void CodeGeneratorX86::UpdateBlockedPairRegisters() const {
- for (int i = 0; i < kNumberOfRegisterPairs; i++) {
- X86ManagedRegister current =
- X86ManagedRegister::FromRegisterPair(static_cast<RegisterPair>(i));
- if (blocked_core_registers_[current.AsRegisterPairLow()]
- || blocked_core_registers_[current.AsRegisterPairHigh()]) {
- blocked_register_pairs_[i] = true;
- }
- }
}
InstructionCodeGeneratorX86::InstructionCodeGeneratorX86(HGraph* graph, CodeGeneratorX86* codegen)
diff --git a/compiler/optimizing/code_generator_x86.h b/compiler/optimizing/code_generator_x86.h
index 25f5c2a..e7d9a43 100644
--- a/compiler/optimizing/code_generator_x86.h
+++ b/compiler/optimizing/code_generator_x86.h
@@ -372,9 +372,6 @@
void DumpCoreRegister(std::ostream& stream, int reg) const OVERRIDE;
void DumpFloatingPointRegister(std::ostream& stream, int reg) const OVERRIDE;
- // Blocks all register pairs made out of blocked core registers.
- void UpdateBlockedPairRegisters() const;
-
ParallelMoveResolverX86* GetMoveResolver() OVERRIDE {
return &move_resolver_;
}
diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc
index f19faa3..9ec32df 100644
--- a/compiler/optimizing/codegen_test.cc
+++ b/compiler/optimizing/codegen_test.cc
@@ -115,8 +115,6 @@
blocked_core_registers_[arm::R4] = true;
blocked_core_registers_[arm::R6] = false;
blocked_core_registers_[arm::R7] = false;
- // Makes pair R6-R7 available.
- blocked_register_pairs_[arm::R6_R7] = false;
}
};
@@ -137,8 +135,6 @@
blocked_core_registers_[arm::R4] = true;
blocked_core_registers_[arm::R6] = false;
blocked_core_registers_[arm::R7] = false;
- // Makes pair R6-R7 available.
- blocked_register_pairs_[arm::R6_R7] = false;
}
};
#endif
@@ -158,14 +154,9 @@
x86::CodeGeneratorX86::SetupBlockedRegisters();
// ebx is a callee-save register in C, but caller-save for ART.
blocked_core_registers_[x86::EBX] = true;
- blocked_register_pairs_[x86::EAX_EBX] = true;
- blocked_register_pairs_[x86::EDX_EBX] = true;
- blocked_register_pairs_[x86::ECX_EBX] = true;
- blocked_register_pairs_[x86::EBX_EDI] = true;
// Make edi available.
blocked_core_registers_[x86::EDI] = false;
- blocked_register_pairs_[x86::ECX_EDI] = false;
}
};
#endif