commit 5762ea01b63a3aab57f339a99c8f126dc3bd7b5e
author Nicolas Geoffray <ngeoffray@google.com> Sun Sep 23 13:49:49 2018 +0100
committer Nicolas Geoffray <ngeoffray@google.com> Mon Sep 24 11:27:23 2018 +0100
tree 56166dc90585b432157780bd39d406f41930a3e0
parent 5d7015cd64085068b1685d44339b4b705ef3f065

Remove superfluous '{'.

bug: 116353081
Test: m
Change-Id: I20061e7056daf3056c055a5fdb38327f5b00dfd6

tools/veridex/flow_analysis.cc

diff --git a/tools/veridex/flow_analysis.cc b/tools/veridex/flow_analysis.cc
index f5eb4ea..69f7def 100644
--- a/tools/veridex/flow_analysis.cc
+++ b/tools/veridex/flow_analysis.cc
@@ -495,7 +495,7 @@
     case Instruction::DIV_INT_LIT8:
     case Instruction::REM_INT_LIT8:
     case Instruction::SHL_INT_LIT8:
-    case Instruction::SHR_INT_LIT8: {
+    case Instruction::SHR_INT_LIT8:
     case Instruction::USHR_INT_LIT8: {
       UpdateRegister(instruction.VRegA(), VeriClass::integer_);
       break;
@@ -537,7 +537,7 @@
     case Instruction::CMPG_FLOAT:
     case Instruction::CMPG_DOUBLE:
     case Instruction::CMPL_FLOAT:
-    case Instruction::CMPL_DOUBLE:
+    case Instruction::CMPL_DOUBLE: {
       UpdateRegister(instruction.VRegA(), VeriClass::integer_);
       break;
     }