Disable some Checker assertions in `1004-checker-volatile-ref-load`.

Temporarily disable some Checker assertions on Baker read barriers in
ART run-test `1004-checker-volatile-ref-load` as they are only valid
when the compiler is emitting Baker read barriers, i.e. when ART is
using the Concurrent Copying (CC) garbage collector.

Since ART's `userfaultfd` Concurrent Mark-Compact (CMC) collector was
enabled in
https://android-review.git.corp.google.com/c/platform/build/+/2607296
(commit 117212e422c98b32305fa934bd0d5250642749a5), those assertions
have started to fail on test configurations using devices that support
`userfaultfd`. Disable them for now, until we have a better way to
support multiple garbage collectors in Checker (see b/283780888).

Test: `atest -a art-run-test-1004-checker-volatile-ref-load` on Pixel 6
Bug: 283392413
Change-Id: I0cd9cea4e4da4e3a642086c0e3bcc7f00700b199
diff --git a/test/1004-checker-volatile-ref-load/src/Main.java b/test/1004-checker-volatile-ref-load/src/Main.java
index 9542f36..6455e3e 100644
--- a/test/1004-checker-volatile-ref-load/src/Main.java
+++ b/test/1004-checker-volatile-ref-load/src/Main.java
@@ -36,16 +36,23 @@
   /// CHECK:       <<Foo:l\d+>> InstanceFieldGet [{{l\d+}}] field_name:Main.foo field_type:Reference loop:<<Loop:B\d+>>
   /// CHECK:       NullCheck [<<Foo>>] dex_pc:<<PC:\d+>> loop:<<Loop>>
   /// CHECK-NEXT:  InstanceFieldGet [<<Foo>>] dex_pc:<<PC>> field_name:Foo.bar field_type:Reference loop:<<Loop>>
-  /// CHECK-NEXT:      add w<<BaseRegNum:\d+>>, {{w\d+}}, #0x8 (8)
-  /// CHECK-NEXT:      adr lr, #+0x{{c|10}}
+  /* The following following Checker assertions are only valid when the compiler is emitting Baker
+     read barriers, i.e. when ART is using the Concurrent Copying (CC) garbage collector.
+
+     TODO(b/283392413, b/283780888): Re-enable the following Checker assertions (by replacing the
+     double forward slash comments with triple forward slash ones) when b/283780888 is resolved.
+
+  // CHECK-NEXT:      add w<<BaseRegNum:\d+>>, {{w\d+}}, #0x8 (8)
+  // CHECK-NEXT:      adr lr, #+0x{{c|10}}
   // The following instruction (generated by
   // `art::arm64::CodeGeneratorARM64::EmitBakerReadBarrierCbnz`) checks the
   // Marking Register (X20) and goes into the Baker read barrier thunk if MR is
   // not null. The null offset (#+0x0) in the CBNZ instruction is a placeholder
   // for the offset to the Baker read barrier thunk (which is not yet set when
   // the CFG output is emitted).
-  /// CHECK-NEXT:      cbnz x20, #+0x0
-  /// CHECK-NEXT:      ldar {{w\d+}}, [x<<BaseRegNum>>]
+  // CHECK-NEXT:      cbnz x20, #+0x0
+  // CHECK-NEXT:      ldar {{w\d+}}, [x<<BaseRegNum>>]
+  */
 
   public void test() {
     // Continually check that reading field `foo.bar` throws a