ARM: VIXL32: Merge (un)signed extensions and integer additions
Test: m test-art-target-run-test-551-checker-shifter-operand
Change-Id: I041e80e51bf0954b38ab20dfa9b14aa7f6d6c53b
diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc
index b9d4700..430cdde 100644
--- a/compiler/optimizing/code_generator_arm_vixl.cc
+++ b/compiler/optimizing/code_generator_arm_vixl.cc
@@ -8269,19 +8269,41 @@
const HDataProcWithShifterOp::OpKind op_kind = instruction->GetOpKind();
if (instruction->GetType() == Primitive::kPrimInt) {
- DCHECK(!HDataProcWithShifterOp::IsExtensionOp(op_kind));
-
+ const vixl32::Register first = InputRegisterAt(instruction, 0);
+ const vixl32::Register output = OutputRegister(instruction);
const vixl32::Register second = instruction->InputAt(1)->GetType() == Primitive::kPrimLong
? LowRegisterFrom(locations->InAt(1))
: InputRegisterAt(instruction, 1);
- GenerateDataProcInstruction(kind,
- OutputRegister(instruction),
- InputRegisterAt(instruction, 0),
- Operand(second,
- ShiftFromOpKind(op_kind),
- instruction->GetShiftAmount()),
- codegen_);
+ if (HDataProcWithShifterOp::IsExtensionOp(op_kind)) {
+ DCHECK_EQ(kind, HInstruction::kAdd);
+
+ switch (op_kind) {
+ case HDataProcWithShifterOp::kUXTB:
+ __ Uxtab(output, first, second);
+ break;
+ case HDataProcWithShifterOp::kUXTH:
+ __ Uxtah(output, first, second);
+ break;
+ case HDataProcWithShifterOp::kSXTB:
+ __ Sxtab(output, first, second);
+ break;
+ case HDataProcWithShifterOp::kSXTH:
+ __ Sxtah(output, first, second);
+ break;
+ default:
+ LOG(FATAL) << "Unexpected operation kind: " << op_kind;
+ UNREACHABLE();
+ }
+ } else {
+ GenerateDataProcInstruction(kind,
+ output,
+ first,
+ Operand(second,
+ ShiftFromOpKind(op_kind),
+ instruction->GetShiftAmount()),
+ codegen_);
+ }
} else {
DCHECK_EQ(instruction->GetType(), Primitive::kPrimLong);