ART: Compiler generated GC map should take care of temp registers.
If the compiler use a temp register as a reference it should be
added to generated GC map along with other SSA regs.
Change-Id: I3c79896dcd72228c9cf2bbbe737642d9ffb7684d
Signed-off-by: Pavel Vyssotski <pavel.n.vyssotski@intel.com>
diff --git a/compiler/dex/quick/codegen_util.cc b/compiler/dex/quick/codegen_util.cc
index c803e65..8629f39 100644
--- a/compiler/dex/quick/codegen_util.cc
+++ b/compiler/dex/quick/codegen_util.cc
@@ -1370,7 +1370,9 @@
DCHECK(first_bb->data_flow_info->vreg_to_ssa_map_exit != nullptr);
const int32_t* first_vreg_to_ssa_map = first_bb->data_flow_info->vreg_to_ssa_map_exit;
references->ClearAllBits();
- for (uint32_t vreg = 0, num_vregs = mir_graph_->GetNumOfCodeVRs(); vreg != num_vregs; ++vreg) {
+ for (uint32_t vreg = 0,
+ num_vregs = mir_graph_->GetNumOfCodeVRs() + mir_graph_->GetNumUsedCompilerTemps();
+ vreg != num_vregs; ++vreg) {
int32_t sreg = first_vreg_to_ssa_map[vreg];
if (sreg != INVALID_SREG && mir_graph_->reg_location_[sreg].ref &&
!mir_graph_->IsConstantNullRef(mir_graph_->reg_location_[sreg])) {
diff --git a/runtime/thread.cc b/runtime/thread.cc
index fe8b0d8..691af34 100644
--- a/runtime/thread.cc
+++ b/runtime/thread.cc
@@ -2361,8 +2361,7 @@
// Can't be null or how would we compile its instructions?
DCHECK(code_item != nullptr) << PrettyMethod(m);
NativePcOffsetToReferenceMap map(native_gc_map);
- size_t num_regs = std::min(map.RegWidth() * 8,
- static_cast<size_t>(code_item->registers_size_));
+ size_t num_regs = map.RegWidth() * 8;
if (num_regs > 0) {
Runtime* runtime = Runtime::Current();
const void* entry_point = runtime->GetInstrumentation()->GetQuickCodeFor(m, sizeof(void*));