commit 3dbcb38a8b2237b0da290ae35dc0caab3cb47b3d
author Roland Levillain <rpl@google.com> Tue Oct 28 17:30:07 2014 +0000
committer Roland Levillain <rpl@google.com> Thu Nov 06 16:40:59 2014 +0000
tree 98ed87e77213fc36fd72b2dbab71156f9176d4ee
parent 55dcfb5e0dd626993bb2b7b9f692c1b02b5d955f

Support float & double negation in the optimizing compiler.

- Add support for the neg-float and neg-double Dex
  instructions in the optimizing compiler.
- Generate x86, x86-64 and ARM (but not ARM64) code for
  float and double HNeg nodes.
- Add related tests to test/415-optimizing-arith-neg.

Change-Id: I29739a86e13dbe6f64e191641d01637c867cba6c

compiler/optimizing/code_generator_arm.cc

diff --git a/compiler/optimizing/code_generator_arm.cc b/compiler/optimizing/code_generator_arm.cc
index dd595d9..1e9fad0 100644
--- a/compiler/optimizing/code_generator_arm.cc
+++ b/compiler/optimizing/code_generator_arm.cc
@@ -1189,7 +1189,8 @@
 
     case Primitive::kPrimFloat:
     case Primitive::kPrimDouble:
-      LOG(FATAL) << "Not yet implemented neg type " << neg->GetResultType();
+      locations->SetInAt(0, Location::RequiresFpuRegister());
+      locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap);
       break;
 
     default:
@@ -1229,8 +1230,14 @@
       break;
 
     case Primitive::kPrimFloat:
+      DCHECK(in.IsFpuRegister());
+      __ vnegs(out.As<SRegister>(), in.As<SRegister>());
+      break;
+
     case Primitive::kPrimDouble:
-      LOG(FATAL) << "Not yet implemented neg type " << neg->GetResultType();
+      DCHECK(in.IsFpuRegisterPair());
+      __ vnegd(FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()),
+               FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
       break;
 
     default: