ART: Transform Sub+Sub into Sub+Add to merge Shl
In the instruction sequence like the following:
t1 = Shl(a, n)
t2 = Sub(t1, *)
r = Sub(*, t2)
Shl cannot be merged with Sub. However it can be done when the first Sub
operands are reordered and the second Sub is replaced with Add:
t1 = Shl(a, n)
t2 = Sub(*, t1)
r = Add(*, t2)
This CL implements this transformation in the ARM/ARM64 instruction simplifiers.
Test: 411-checker-instruct-simplifier-hrem
Test: test.py --host --optimizing --jit --gtest --interpreter
Test: test.py --target --optimizing --jit --interpreter
Test: run-gtests.sh
Change-Id: I24fde29d307f3ad53a8df8bbafe945b4f733ce6c
diff --git a/compiler/optimizing/instruction_simplifier_arm64.cc b/compiler/optimizing/instruction_simplifier_arm64.cc
index e23decb..260bfaf 100644
--- a/compiler/optimizing/instruction_simplifier_arm64.cc
+++ b/compiler/optimizing/instruction_simplifier_arm64.cc
@@ -25,6 +25,7 @@
using helpers::CanFitInShifterOperand;
using helpers::HasShifterOperand;
+using helpers::IsSubRightSubLeftShl;
namespace arm64 {
@@ -76,6 +77,7 @@
void VisitOr(HOr* instruction) override;
void VisitShl(HShl* instruction) override;
void VisitShr(HShr* instruction) override;
+ void VisitSub(HSub* instruction) override;
void VisitTypeConversion(HTypeConversion* instruction) override;
void VisitUShr(HUShr* instruction) override;
void VisitXor(HXor* instruction) override;
@@ -239,6 +241,15 @@
}
}
+void InstructionSimplifierArm64Visitor::VisitSub(HSub* instruction) {
+ if (IsSubRightSubLeftShl(instruction)) {
+ HInstruction* shl = instruction->GetRight()->InputAt(0);
+ if (shl->InputAt(1)->IsConstant() && TryReplaceSubSubWithSubAdd(instruction)) {
+ TryMergeIntoUsersShifterOperand(shl);
+ }
+ }
+}
+
void InstructionSimplifierArm64Visitor::VisitTypeConversion(HTypeConversion* instruction) {
DataType::Type result_type = instruction->GetResultType();
DataType::Type input_type = instruction->GetInputType();