commit 3c03503d66df3b4440f851ae7d0c4fae5e7872df
author Nicolas Geoffray <ngeoffray@google.com> Tue Oct 28 10:46:40 2014 +0000
committer Nicolas Geoffray <ngeoffray@google.com> Tue Oct 28 10:46:40 2014 +0000
tree 6f10a0da8e1a06d4a0a88e015db091a824aec7fb
parent d3271e8a48768ed53bfa2515474b57245e7d9a41

Follow-up CL after hard float changes.

Addressing comments from Zheng Xu.

Change-Id: I8c599cdfab03373e82a1b90b711005c490bc6ca0

compiler/optimizing/code_generator_arm.cc

diff --git a/compiler/optimizing/code_generator_arm.cc b/compiler/optimizing/code_generator_arm.cc
index 4733432..d50150e 100644
--- a/compiler/optimizing/code_generator_arm.cc
+++ b/compiler/optimizing/code_generator_arm.cc
@@ -272,7 +272,8 @@
     }
 
     case Primitive::kPrimDouble: {
-      int reg = FindTwoFreeConsecutiveEntries(blocked_fpu_registers_, kNumberOfSRegisters);
+      int reg = FindTwoFreeConsecutiveAlignedEntries(blocked_fpu_registers_, kNumberOfSRegisters);
+      DCHECK_EQ(reg % 2, 0);
       return Location::FpuRegisterPairLocation(reg, reg + 1);
     }
 
@@ -317,6 +318,14 @@
   blocked_fpu_registers_[S21] = true;
   blocked_fpu_registers_[S22] = true;
   blocked_fpu_registers_[S23] = true;
+  blocked_fpu_registers_[S24] = true;
+  blocked_fpu_registers_[S25] = true;
+  blocked_fpu_registers_[S26] = true;
+  blocked_fpu_registers_[S27] = true;
+  blocked_fpu_registers_[S28] = true;
+  blocked_fpu_registers_[S29] = true;
+  blocked_fpu_registers_[S30] = true;
+  blocked_fpu_registers_[S31] = true;
 
   UpdateBlockedPairRegisters();
 }