Arm64 hard-float
Basic enabling of hard-float for Arm64. In future CLs we'll
consolidate the various targets - there is a lot of overlap.
Compilation remains turned off in this CL, but I expect
to enable a subset shortly. With compilation fully enabled
(including the EXPERIMENTAL opcodes with the exception of
REM and THROW), we get the following run-test results:
003-omnibus-opcode failures:
Classes.checkCast
Classes.arrayInstance
UnresTest2
Haven't gone deep, but these appear to be related to throw/catch and/or
stacktrace.
For REM, the generated code looks reasonable to me - my guess is that
we've got something wrong on the transition to the runtime. Haven't
looked deeper yet, though.
The bulk of the other failure also appear to be related to transitioning
to the runtime system, or handling try/catch.
run-test status:
Status with optimizations disabled, REM_FLOAT/DOUBLE and THROW disabled:
succeeded tests: 94
failed tests: 22
failed: 003-omnibus-opcodes
failed: 004-annotations
failed: 009-instanceof2
failed: 024-illegal-access
failed: 025-access-controller
failed: 031-class-attributes
failed: 044-proxy
failed: 045-reflect-array
failed: 046-reflect
failed: 058-enum-order
failed: 062-character-encodings
failed: 063-process-manager
failed: 064-field-access
failed: 068-classloader
failed: 071-dexfile
failed: 083-compiler-regressions
failed: 084-class-init
failed: 086-null-super
failed: 087-gc-after-link
failed: 100-reflect2
failed: 107-int-math2
failed: 201-built-in-exception-detail-messages
Change-Id: Ib66209285cad8998d77a14781de300af02a96b15
diff --git a/compiler/dex/quick/mir_to_lir.cc b/compiler/dex/quick/mir_to_lir.cc
index 40205ea..1fc4163 100644
--- a/compiler/dex/quick/mir_to_lir.cc
+++ b/compiler/dex/quick/mir_to_lir.cc
@@ -66,7 +66,7 @@
}
}
-// TODO: needs revisit for 64-bit.
+// TODO: simplify when 32-bit targets go hard-float.
RegStorage Mir2Lir::LoadArg(int in_position, RegisterClass reg_class, bool wide) {
ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg);
int offset = StackVisitor::GetOutVROffset(in_position, cu_->instruction_set);
@@ -87,10 +87,11 @@
offset += sizeof(uint64_t);
}
- if (cu_->instruction_set == kX86_64) {
+ if (cu_->target64) {
RegStorage reg_arg = GetArgMappingToPhysicalReg(in_position);
if (!reg_arg.Valid()) {
- RegStorage new_reg = wide ? AllocTypedTempWide(false, reg_class) : AllocTypedTemp(false, reg_class);
+ RegStorage new_reg =
+ wide ? AllocTypedTempWide(false, reg_class) : AllocTypedTemp(false, reg_class);
LoadBaseDisp(TargetReg(kSp), offset, new_reg, wide ? k64 : k32);
return new_reg;
} else {
@@ -159,6 +160,7 @@
return reg_arg;
}
+// TODO: simpilfy when 32-bit targets go hard float.
void Mir2Lir::LoadArgDirect(int in_position, RegLocation rl_dest) {
ScopedMemRefType mem_ref_type(this, ResourceMask::kDalvikReg);
int offset = StackVisitor::GetOutVROffset(in_position, cu_->instruction_set);
@@ -186,7 +188,7 @@
Load32Disp(TargetReg(kSp), offset, rl_dest.reg);
}
} else {
- if (cu_->instruction_set == kX86_64) {
+ if (cu_->target64) {
RegStorage reg = GetArgMappingToPhysicalReg(in_position);
if (reg.Valid()) {
OpRegCopy(rl_dest.reg, reg);