Minor cleanup.

Change-Id: I244ba8d9561f2f5ba7b21fafaf6ff2eba0314984
diff --git a/src/assembler.cc b/src/assembler.cc
index dfee811..2adf30b 100644
--- a/src/assembler.cc
+++ b/src/assembler.cc
@@ -27,45 +27,10 @@
 namespace art {
 
 static byte* NewContents(size_t capacity) {
-  byte* result = new byte[capacity];
-#if defined(DEBUG)
-  // Initialize the buffer with kBreakPointInstruction to force a break
-  // point if we ever execute an uninitialized part of the code buffer.
-  Assembler::InitializeMemoryWithBreakpoints(result, capacity);
-#endif
-  return result;
+  return new byte[capacity];
 }
 
 
-#if defined(DEBUG)
-AssemblerBuffer::EnsureCapacity::EnsureCapacity(AssemblerBuffer* buffer) {
-  if (buffer->cursor() >= buffer->limit()) buffer->ExtendCapacity();
-  // In debug mode, we save the assembler buffer along with the gap
-  // size before we start emitting to the buffer. This allows us to
-  // check that any single generated instruction doesn't overflow the
-  // limit implied by the minimum gap size.
-  buffer_ = buffer;
-  gap_ = ComputeGap();
-  // Make sure that extending the capacity leaves a big enough gap
-  // for any kind of instruction.
-  CHECK_GE(gap_, kMinimumGap);
-  // Mark the buffer as having ensured the capacity.
-  CHECK(!buffer->HasEnsuredCapacity());  // Cannot nest.
-  buffer->has_ensured_capacity_ = true;
-}
-
-
-AssemblerBuffer::EnsureCapacity::~EnsureCapacity() {
-  // Unmark the buffer, so we cannot emit after this.
-  buffer_->has_ensured_capacity_ = false;
-  // Make sure the generated instruction doesn't take up more
-  // space than the minimum gap.
-  int delta = gap_ - ComputeGap();
-  CHECK_LE(delta, kMinimumGap);
-}
-#endif
-
-
 AssemblerBuffer::AssemblerBuffer() {
   static const size_t kInitialBufferCapacity = 4 * KB;
   contents_ = NewContents(kInitialBufferCapacity);
@@ -73,7 +38,7 @@
   limit_ = ComputeLimit(contents_, kInitialBufferCapacity);
   fixup_ = NULL;
   slow_path_ = NULL;
-#if defined(DEBUG)
+#ifndef NDEBUG
   has_ensured_capacity_ = false;
   fixups_processed_ = false;
 #endif
@@ -104,7 +69,7 @@
   instructions.CopyFrom(0, from);
   // Process fixups in the instructions.
   ProcessFixups(instructions);
-#if defined(DEBUG)
+#ifndef NDEBUG
   fixups_processed_ = true;
 #endif
 }
diff --git a/src/assembler.h b/src/assembler.h
index ae2619e..ae29a24 100644
--- a/src/assembler.h
+++ b/src/assembler.h
@@ -204,12 +204,14 @@
   //     AssemblerBuffer::EnsureCapacity ensured(&buffer);
   //     ... emit bytes for single instruction ...
 
-#ifdef DEBUG
+#ifndef NDEBUG
 
   class EnsureCapacity {
    public:
     explicit EnsureCapacity(AssemblerBuffer* buffer) {
-      if (buffer->cursor() >= buffer->limit()) buffer->ExtendCapacity();
+      if (buffer->cursor() >= buffer->limit()) {
+        buffer->ExtendCapacity();
+      }
       // In debug mode, we save the assembler buffer along with the gap
       // size before we start emitting to the buffer. This allows us to
       // check that any single generated instruction doesn't overflow the
diff --git a/src/assembler_x86.cc b/src/assembler_x86.cc
index a283299..18dd1a7 100644
--- a/src/assembler_x86.cc
+++ b/src/assembler_x86.cc
@@ -54,10 +54,6 @@
   return os << "ST" << static_cast<int>(reg);
 }
 
-void X86Assembler::InitializeMemoryWithBreakpoints(byte* data, size_t length) {
-  memset(reinterpret_cast<void*>(data), Instr::kBreakPointInstruction, length);
-}
-
 void X86Assembler::call(Register reg) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   EmitUint8(0xFF);
diff --git a/src/assembler_x86.h b/src/assembler_x86.h
index 70bd70c..e87ce34 100644
--- a/src/assembler_x86.h
+++ b/src/assembler_x86.h
@@ -460,8 +460,6 @@
   // Debugging and bringup support.
   void Stop(const char* message);
 
-  static void InitializeMemoryWithBreakpoints(byte* data, size_t length);
-
   //
   // Overridden common assembler high-level functionality
   //
diff --git a/src/constants_arm.h b/src/constants_arm.h
index dc3264e..0a53480 100644
--- a/src/constants_arm.h
+++ b/src/constants_arm.h
@@ -227,17 +227,6 @@
 };
 
 
-// Special Supervisor Call 24-bit codes used in the presence of the ARM
-// simulator for redirection, breakpoints, stop messages, and spill markers.
-// See /usr/include/asm/unistd.h
-const uint32_t kRedirectionSvcCode = 0x90001f;  //  unused syscall, was sys_stty
-const uint32_t kBreakpointSvcCode = 0x900020;  // unused syscall, was sys_gtty
-const uint32_t kStopMessageSvcCode = 0x9f0001;  // __ARM_NR_breakpoint
-const uint32_t kSpillMarkerSvcBase = 0x9f0100;  // unused ARM private syscall
-const uint32_t kWordSpillMarkerSvcCode = kSpillMarkerSvcBase + 1;
-const uint32_t kDWordSpillMarkerSvcCode = kSpillMarkerSvcBase + 2;
-
-
 // Constants used for the decoding or encoding of the individual fields of
 // instructions. Based on the "Figure 3-1 ARM instruction set summary".
 enum InstructionFields {
@@ -296,46 +285,6 @@
 // List of registers used in load/store multiple.
 typedef uint16_t RegList;
 
-const RegList kAllCoreRegistersList = 0xFFFF;
-
-// C++ ABI call registers
-const int kAbiRegisterCount = 4;
-const Register kAbiRegisters[kAbiRegisterCount] = { R0, R1, R2, R3 };
-const RegList kAbiRegisterList = (1 << R0) | (1 << R1) | (1 << R2) | (1 << R3);
-
-// Parfait callee-saved registers.
-#ifdef DEBUG
-// Save FP only in Debug mode.
-static const Register kUnsavedCoreRegisters[] = { IP, SP, LR, PC };
-static const RegList kUnsavedCoreRegistersList =
-    (1 << IP | 1 << SP | 1 << LR | 1 << PC);
-#else
-static const Register kUnsavedCoreRegisters[] = { FP, IP, SP, LR, PC };
-static const RegList kUnsavedCoreRegistersList =
-    (1 << FP | 1 << IP | 1 << SP | 1 << LR | 1 << PC);
-#endif  // DEBUG
-static const RegList kSavedCoreRegistersList =
-    kAllCoreRegistersList & (~kUnsavedCoreRegistersList);
-static const int kNumberOfUnsavedCoreRegisters =
-    arraysize(kUnsavedCoreRegisters);
-static const int kNumberOfSavedCoreRegisters =
-    kNumberOfCoreRegisters - kNumberOfUnsavedCoreRegisters;
-
-// D8-D15 are ABI callee saved. No need to save them. If there are more than 16
-// D-registers than the following ones (D16 ...) are not ABI callee saved and
-// must be saved by parfait.
-static const int kNumberOfUnsavedDRegisters = 8;
-static const int kNumberOfSavedDRegisters =
-    kNumberOfDRegisters - kNumberOfUnsavedDRegisters;
-
-// Frame layout constants.
-const int kExitLinkByteOffsetFromFp = 9 * kPointerSize;
-const int kSpByteOffsetFromPreviousFp = 2 * kPointerSize;
-const int kPcAddressByteOffsetFromSp = -1 * kPointerSize;
-const int kPcAddressByteOffsetFromExitFp = -1 * kPointerSize;
-const int kCallSaveArea = 2 * kPointerSize;
-const int kCallerSavedCoreRegistersByteOffsetFromFp = -2 * kPointerSize;
-
 // The class Instr enables access to individual fields defined in the ARM
 // architecture instruction set encoding as described in figure A3-1.
 //
@@ -356,7 +305,6 @@
     kPCReadOffset = 8
   };
 
-  static const int kBreakPointInstructionSize = kInstrSize;
   bool IsBreakPoint() {
     return IsBkpt();
   }
diff --git a/src/constants_x86.h b/src/constants_x86.h
index 65e2298..7181f99 100644
--- a/src/constants_x86.h
+++ b/src/constants_x86.h
@@ -118,10 +118,8 @@
   static const uint8_t kHltInstruction = 0xF4;
   // We prefer not to use the int3 instruction since it conflicts with gdb.
   static const uint8_t kBreakPointInstruction = kHltInstruction;
-  static const int kBreakPointInstructionSize = 1;
 
   bool IsBreakPoint() {
-    CHECK_EQ(kBreakPointInstructionSize, 1);
     return (*reinterpret_cast<const uint8_t*>(this)) == kBreakPointInstruction;
   }