ART: Allow PackedSwitch instructions with zero targets
Optimizing and the interpreter wrongly assumed that a PackedSwitch
always has at least one target. This patch removes the corresponding
DCHECKs and adds a regression test case.
This is a resubmission of CL I32b7033ed38de6f1d1a6ee5d5bf12f3a47c9b37e
Bug: 21863783
Change-Id: I04e6e124bdd16591ba27c79490e6ce183c36b691
diff --git a/compiler/optimizing/builder.cc b/compiler/optimizing/builder.cc
index 1f9287c..cdd7636 100644
--- a/compiler/optimizing/builder.cc
+++ b/compiler/optimizing/builder.cc
@@ -1210,14 +1210,20 @@
}
void HGraphBuilder::BuildPackedSwitch(const Instruction& instruction, uint32_t dex_pc) {
+ // Verifier guarantees that the payload for PackedSwitch contains:
+ // (a) number of entries (may be zero)
+ // (b) first and lowest switch case value (entry 0, always present)
+ // (c) list of target pcs (entries 1 <= i <= N)
SwitchTable table(instruction, dex_pc, false);
// Value to test against.
HInstruction* value = LoadLocal(instruction.VRegA(), Primitive::kPrimInt);
+ // Retrieve number of entries.
uint16_t num_entries = table.GetNumEntries();
- // There should be at least one entry here.
- DCHECK_GT(num_entries, 0U);
+ if (num_entries == 0) {
+ return;
+ }
// Chained cmp-and-branch, starting from starting_key.
int32_t starting_key = table.GetEntryAt(0);
@@ -1229,6 +1235,10 @@
}
void HGraphBuilder::BuildSparseSwitch(const Instruction& instruction, uint32_t dex_pc) {
+ // Verifier guarantees that the payload for SparseSwitch contains:
+ // (a) number of entries (may be zero)
+ // (b) sorted key values (entries 0 <= i < N)
+ // (c) target pcs corresponding to the switch values (entries N <= i < 2*N)
SwitchTable table(instruction, dex_pc, true);
// Value to test against.