MIPS64: Implement HSelect
Test: mma test-art-host-gtest
Test: mma test-art-target-gtest in QEMU (MIPS64R6)
Test: ./testrunner.py --target --optimizing in QEMU (MIPS64R6)
Change-Id: I633fc479e0ca61b7d49b4c36fbe5db9a94da535d
diff --git a/compiler/utils/mips64/assembler_mips64.h b/compiler/utils/mips64/assembler_mips64.h
index c39d120..a062f5f 100644
--- a/compiler/utils/mips64/assembler_mips64.h
+++ b/compiler/utils/mips64/assembler_mips64.h
@@ -599,6 +599,10 @@
void FloorWD(FpuRegister fd, FpuRegister fs);
void SelS(FpuRegister fd, FpuRegister fs, FpuRegister ft);
void SelD(FpuRegister fd, FpuRegister fs, FpuRegister ft);
+ void SeleqzS(FpuRegister fd, FpuRegister fs, FpuRegister ft);
+ void SeleqzD(FpuRegister fd, FpuRegister fs, FpuRegister ft);
+ void SelnezS(FpuRegister fd, FpuRegister fs, FpuRegister ft);
+ void SelnezD(FpuRegister fd, FpuRegister fs, FpuRegister ft);
void RintS(FpuRegister fd, FpuRegister fs);
void RintD(FpuRegister fd, FpuRegister fs);
void ClassS(FpuRegister fd, FpuRegister fs);