Fix duplicate checks in JNI macro assemblers.
Instead of checking one register twice, check the other
register passed to the function.
Test: Run ART test suite on host and Nexus 5.
Bug: 30739460
Change-Id: If868ea14f5c192982488ed065b279a019b5b7cf4
diff --git a/compiler/utils/arm/jni_macro_assembler_arm.cc b/compiler/utils/arm/jni_macro_assembler_arm.cc
index c039816..af5ebb4 100644
--- a/compiler/utils/arm/jni_macro_assembler_arm.cc
+++ b/compiler/utils/arm/jni_macro_assembler_arm.cc
@@ -243,14 +243,16 @@
}
void ArmJNIMacroAssembler::LoadRef(ManagedRegister mdest,
- ManagedRegister base,
+ ManagedRegister mbase,
MemberOffset offs,
bool unpoison_reference) {
+ ArmManagedRegister base = mbase.AsArm();
ArmManagedRegister dst = mdest.AsArm();
- CHECK(dst.IsCoreRegister() && dst.IsCoreRegister()) << dst;
+ CHECK(base.IsCoreRegister()) << base;
+ CHECK(dst.IsCoreRegister()) << dst;
__ LoadFromOffset(kLoadWord,
dst.AsCoreRegister(),
- base.AsArm().AsCoreRegister(),
+ base.AsCoreRegister(),
offs.Int32Value());
if (unpoison_reference) {
__ MaybeUnpoisonHeapReference(dst.AsCoreRegister());
@@ -263,13 +265,16 @@
__ LoadFromOffset(kLoadWord, dst.AsCoreRegister(), SP, src.Int32Value());
}
-void ArmJNIMacroAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base,
- Offset offs) {
+void ArmJNIMacroAssembler::LoadRawPtr(ManagedRegister mdest,
+ ManagedRegister mbase,
+ Offset offs) {
+ ArmManagedRegister base = mbase.AsArm();
ArmManagedRegister dst = mdest.AsArm();
- CHECK(dst.IsCoreRegister() && dst.IsCoreRegister()) << dst;
+ CHECK(base.IsCoreRegister()) << base;
+ CHECK(dst.IsCoreRegister()) << dst;
__ LoadFromOffset(kLoadWord,
dst.AsCoreRegister(),
- base.AsArm().AsCoreRegister(),
+ base.AsCoreRegister(),
offs.Int32Value());
}
@@ -530,8 +535,9 @@
// TODO: not validating references.
}
-void ArmJNIMacroAssembler::Call(ManagedRegister mbase, Offset offset,
- ManagedRegister mscratch) {
+void ArmJNIMacroAssembler::Call(ManagedRegister mbase,
+ Offset offset,
+ ManagedRegister mscratch) {
ArmManagedRegister base = mbase.AsArm();
ArmManagedRegister scratch = mscratch.AsArm();
CHECK(base.IsCoreRegister()) << base;
diff --git a/compiler/utils/x86_64/jni_macro_assembler_x86_64.cc b/compiler/utils/x86_64/jni_macro_assembler_x86_64.cc
index 47fb59b..3e687a7 100644
--- a/compiler/utils/x86_64/jni_macro_assembler_x86_64.cc
+++ b/compiler/utils/x86_64/jni_macro_assembler_x86_64.cc
@@ -288,21 +288,27 @@
}
void X86_64JNIMacroAssembler::LoadRef(ManagedRegister mdest,
- ManagedRegister base,
+ ManagedRegister mbase,
MemberOffset offs,
bool unpoison_reference) {
+ X86_64ManagedRegister base = mbase.AsX86_64();
X86_64ManagedRegister dest = mdest.AsX86_64();
- CHECK(dest.IsCpuRegister() && dest.IsCpuRegister());
- __ movl(dest.AsCpuRegister(), Address(base.AsX86_64().AsCpuRegister(), offs));
+ CHECK(base.IsCpuRegister());
+ CHECK(dest.IsCpuRegister());
+ __ movl(dest.AsCpuRegister(), Address(base.AsCpuRegister(), offs));
if (unpoison_reference) {
__ MaybeUnpoisonHeapReference(dest.AsCpuRegister());
}
}
-void X86_64JNIMacroAssembler::LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) {
+void X86_64JNIMacroAssembler::LoadRawPtr(ManagedRegister mdest,
+ ManagedRegister mbase,
+ Offset offs) {
+ X86_64ManagedRegister base = mbase.AsX86_64();
X86_64ManagedRegister dest = mdest.AsX86_64();
- CHECK(dest.IsCpuRegister() && dest.IsCpuRegister());
- __ movq(dest.AsCpuRegister(), Address(base.AsX86_64().AsCpuRegister(), offs));
+ CHECK(base.IsCpuRegister());
+ CHECK(dest.IsCpuRegister());
+ __ movq(dest.AsCpuRegister(), Address(base.AsCpuRegister(), offs));
}
void X86_64JNIMacroAssembler::LoadRawPtrFromThread(ManagedRegister mdest, ThreadOffset64 offs) {