Minor changes to art::arm::Thumb2Assembler::StoreToOffset.
- Use CHECK instead of DCHECK for consistency reasons.
- Adjust documentation.
- Stylistic changes.
Change-Id: Ibc8261a0eb5a8b4d62edc1df0d5fb378e5021c22
diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc
index b499ddd..4e918e9 100644
--- a/compiler/utils/arm/assembler_thumb2.cc
+++ b/compiler/utils/arm/assembler_thumb2.cc
@@ -3299,17 +3299,17 @@
Register tmp_reg = kNoRegister;
if (!Address::CanHoldStoreOffsetThumb(type, offset)) {
CHECK_NE(base, IP);
- if (reg != IP &&
- (type != kStoreWordPair || reg + 1 != IP)) {
+ if ((reg != IP) &&
+ ((type != kStoreWordPair) || (reg + 1 != IP))) {
tmp_reg = IP;
} else {
// Be careful not to use IP twice (for `reg` (or `reg` + 1 in
- // the case of a word-pair store)) and to build the Address
- // object used by the store instruction(s) below). Instead,
- // save R5 on the stack (or R6 if R5 is not available), use it
- // as secondary temporary register, and restore it after the
- // store instruction has been emitted.
- tmp_reg = base != R5 ? R5 : R6;
+ // the case of a word-pair store) and `base`) to build the
+ // Address object used by the store instruction(s) below.
+ // Instead, save R5 on the stack (or R6 if R5 is already used by
+ // `base`), use it as secondary temporary register, and restore
+ // it after the store instruction has been emitted.
+ tmp_reg = (base != R5) ? R5 : R6;
Push(tmp_reg);
if (base == SP) {
offset += kRegisterSize;
@@ -3338,8 +3338,8 @@
LOG(FATAL) << "UNREACHABLE";
UNREACHABLE();
}
- if (tmp_reg != kNoRegister && tmp_reg != IP) {
- DCHECK(tmp_reg == R5 || tmp_reg == R6);
+ if ((tmp_reg != kNoRegister) && (tmp_reg != IP)) {
+ CHECK((tmp_reg == R5) || (tmp_reg == R6));
Pop(tmp_reg);
}
}