Compiler: LIR restructuring

Continuing restructuring of the compiler.  In this installment,
all LIR reverences are moved from compiler_ir down to quick.  Further,
all Portable data is moved to from compiler_ir down to portable.

In short, the great dumping ground of CompilationUnit has been
split into three smaller dumping grounds of MIRGraph, Codegen
and MIRConverter.  From here, subsequent CLs will repartition
those smaller dumping grounds into (hopefully) more coherent classes.
As a result, most function signatures have been altered to remove
the passing around of a CompilationUnit* pointer.

Change-Id: I7195f7baecd81e87786a952e18bbce0b6ceeaac4
diff --git a/src/compiler/dex/ssa_transformation.cc b/src/compiler/dex/ssa_transformation.cc
index b13cf05..d8341e3 100644
--- a/src/compiler/dex/ssa_transformation.cc
+++ b/src/compiler/dex/ssa_transformation.cc
@@ -17,6 +17,8 @@
 #include "compiler_internals.h"
 #include "dataflow_iterator.h"
 
+#define NOTVISITED (-1)
+
 namespace art {
 
 BasicBlock* MIRGraph::NeedsVisit(BasicBlock* bb) {
@@ -179,7 +181,7 @@
 
   /* hacky loop detection */
   if (bb->taken && IsBitSet(bb->dominators, bb->taken->id)) {
-    cu_->attributes |= METHOD_HAS_LOOP;
+    attributes_ |= METHOD_HAS_LOOP;
   }
 }
 
@@ -352,9 +354,6 @@
     DCHECK_NE(idom_dfs_idx, NOTVISITED);
     int i_dom_idx = dfs_post_order_.elem_list[idom_dfs_idx];
     BasicBlock* i_dom = GetBasicBlock(i_dom_idx);
-    if (cu_->enable_debug & (1 << kDebugVerifyDataflow)) {
-      DCHECK_EQ(bb->i_dom->id, i_dom->id);
-    }
     bb->i_dom = i_dom;
     /* Add bb to the i_dominated set of the immediate dominator block */
     SetBit(cu_, i_dom->i_dominated, bb->id);
@@ -674,45 +673,43 @@
   /* Compute the DFS order */
   ComputeDFSOrders();
 
-  if (!cu_->disable_dataflow) {
-    /* Compute the dominator info */
-    ComputeDominators();
-  }
+  /* Compute the dominator info */
+  ComputeDominators();
 
   /* Allocate data structures in preparation for SSA conversion */
   CompilerInitializeSSAConversion();
 
-  if (!cu_->disable_dataflow) {
-    /* Find out the "Dalvik reg def x block" relation */
-    ComputeDefBlockMatrix();
+  /* Find out the "Dalvik reg def x block" relation */
+  ComputeDefBlockMatrix();
 
-    /* Insert phi nodes to dominance frontiers for all variables */
-    InsertPhiNodes();
-  }
+  /* Insert phi nodes to dominance frontiers for all variables */
+  InsertPhiNodes();
 
   /* Rename register names by local defs and phi nodes */
-  AllNodesIterator iter(this, false /* not iterative */);
-  for (BasicBlock* bb = iter.Next(); bb != NULL; bb = iter.Next()) {
+  AllNodesIterator iter1(this, false /* not iterative */);
+  for (BasicBlock* bb = iter1.Next(); bb != NULL; bb = iter1.Next()) {
     ClearVisitedFlag(bb);
   }
   DoDFSPreOrderSSARename(GetEntryBlock());
 
-  if (!cu_->disable_dataflow) {
-    /*
-     * Shared temp bit vector used by each block to count the number of defs
-     * from all the predecessor blocks.
-     */
-    temp_ssa_register_v_ = AllocBitVector(cu_, GetNumSSARegs(), false, kBitMapTempSSARegisterV);
+  /*
+   * Shared temp bit vector used by each block to count the number of defs
+   * from all the predecessor blocks.
+   */
+  temp_ssa_register_v_ = AllocBitVector(cu_, GetNumSSARegs(), false, kBitMapTempSSARegisterV);
 
-    /* Insert phi-operands with latest SSA names from predecessor blocks */
-    ReachableNodesIterator iter(this, false /* not iterative */);
-    for (BasicBlock* bb = iter.Next(); bb != NULL; bb = iter.Next()) {
-      InsertPhiNodeOperands(bb);
-    }
+  /* Insert phi-operands with latest SSA names from predecessor blocks */
+  ReachableNodesIterator iter2(this, false /* not iterative */);
+  for (BasicBlock* bb = iter2.Next(); bb != NULL; bb = iter2.Next()) {
+    InsertPhiNodeOperands(bb);
   }
+
   if (cu_->enable_debug & (1 << kDebugDumpCFG)) {
     DumpCFG("/sdcard/3_post_ssa_cfg/", false);
   }
+  if (cu_->enable_debug & (1 << kDebugVerifyDataflow)) {
+    VerifyDataflow();
+  }
 }
 
 }  // namespace art