x86: Add assembler tests and clean up style.

This is a follow-up after
    https://android-review.googlesource.com/923493

Test: m test-art-host-gtest
Change-Id: Id287815c8ffc001d7cf7a4838c744620a553f662
diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc
index 01eb160..bcc197b 100644
--- a/compiler/utils/x86/assembler_x86.cc
+++ b/compiler/utils/x86/assembler_x86.cc
@@ -188,7 +188,7 @@
 
 void X86Assembler::blsi(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  uint8_t byte_zero = EmitVexPrefixByteZero(false /*is_two_byte*/);
+  uint8_t byte_zero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ false);
   uint8_t byte_one  = EmitVexPrefixByteOne(false, false, false, SET_VEX_M_0F_38);
   uint8_t byte_two  = EmitVexPrefixByteTwo(false,
                                            X86ManagedRegister::FromCpuRegister(dst),
@@ -202,7 +202,7 @@
 
 void X86Assembler::blsmsk(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  uint8_t byte_zero = EmitVexPrefixByteZero(false /*is_two_byte*/);
+  uint8_t byte_zero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ false);
   uint8_t byte_one = EmitVexPrefixByteOne(false, false, false, SET_VEX_M_0F_38);
   uint8_t byte_two = EmitVexPrefixByteTwo(false,
                                          X86ManagedRegister::FromCpuRegister(dst),
@@ -216,7 +216,7 @@
 
 void X86Assembler::blsr(Register dst, Register src) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  uint8_t byte_zero = EmitVexPrefixByteZero(false /*is_two_byte*/);
+  uint8_t byte_zero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ false);
   uint8_t byte_one = EmitVexPrefixByteOne(false, false, false,  SET_VEX_M_0F_38);
   uint8_t byte_two = EmitVexPrefixByteTwo(false,
                                           X86ManagedRegister::FromCpuRegister(dst),
@@ -434,11 +434,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix*/
-  uint8_t byte_zero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t byte_zero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t byte_one = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t byte_one = EmitVexPrefixByteOne(/*R=*/ false,
                                           vvvv_reg,
                                           SET_VEX_L_128,
                                           SET_VEX_PP_NONE);
@@ -466,11 +466,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix*/
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_NONE);
@@ -498,11 +498,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix*/
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_NONE);
@@ -530,11 +530,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix*/
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_NONE);
@@ -562,11 +562,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix*/
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_NONE);
@@ -745,11 +745,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix*/
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg ,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_66);
@@ -778,11 +778,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix*/
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_66);
@@ -811,11 +811,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix*/
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_66);
@@ -845,11 +845,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix */
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.*/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_66);
@@ -878,11 +878,11 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix */
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
   /**a REX prefix is necessary only if an instruction references one of the
   extended registers or uses a 64-bit operand.**/
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_66);
@@ -1085,9 +1085,9 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix */
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_66);
@@ -1116,9 +1116,9 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix */
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_66);
@@ -1147,9 +1147,9 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix */
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_F3);
@@ -1178,9 +1178,9 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   /**Instruction VEX Prefix */
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_66);
@@ -1210,9 +1210,9 @@
   DCHECK(CpuHasAVXorAVX2FeatureFlag());
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
   // Instruction VEX Prefix
-  uint8_t ByteZero = EmitVexPrefixByteZero(/**is_twobyte_form= */true);
+  uint8_t ByteZero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ true);
   X86ManagedRegister vvvv_reg = ManagedRegister::NoRegister().AsX86();
-  uint8_t ByteOne = EmitVexPrefixByteOne(/**R = */false,
+  uint8_t ByteOne = EmitVexPrefixByteOne(/*R=*/ false,
                                          vvvv_reg,
                                          SET_VEX_L_128,
                                          SET_VEX_PP_F3);
@@ -1716,12 +1716,12 @@
 
 void X86Assembler::andn(Register dst, Register src1, Register src2) {
   AssemblerBuffer::EnsureCapacity ensured(&buffer_);
-  uint8_t byte_zero = EmitVexPrefixByteZero(/**is_twobyte_form= */false);
-  uint8_t byte_one = EmitVexPrefixByteOne(/**R = */false,
-                                          /**X = */false,
-                                          /**B = */false,
+  uint8_t byte_zero = EmitVexPrefixByteZero(/*is_twobyte_form=*/ false);
+  uint8_t byte_one = EmitVexPrefixByteOne(/*R=*/ false,
+                                          /*X=*/ false,
+                                          /*B=*/ false,
                                           SET_VEX_M_0F_38);
-  uint8_t byte_two = EmitVexPrefixByteTwo(/**W= */false,
+  uint8_t byte_two = EmitVexPrefixByteTwo(/*W=*/ false,
                                           X86ManagedRegister::FromCpuRegister(src1),
                                           SET_VEX_L_128,
                                           SET_VEX_PP_NONE);
diff --git a/compiler/utils/x86/assembler_x86_test.cc b/compiler/utils/x86/assembler_x86_test.cc
index 5197156..ee29482 100644
--- a/compiler/utils/x86/assembler_x86_test.cc
+++ b/compiler/utils/x86/assembler_x86_test.cc
@@ -501,6 +501,10 @@
   DriverStr(RepeatFF(&x86::X86Assembler::vmovaps, "vmovaps %{reg2}, %{reg1}"), "vmovaps");
 }
 
+TEST_F(AssemblerX86AVXTest, Movaps) {
+  DriverStr(RepeatFF(&x86::X86Assembler::movaps, "vmovaps %{reg2}, %{reg1}"), "avx_movaps");
+}
+
 TEST_F(AssemblerX86Test, MovapsLoad) {
   DriverStr(RepeatFA(&x86::X86Assembler::movaps, "movaps {mem}, %{reg}"), "movaps_load");
 }
@@ -509,6 +513,10 @@
   DriverStr(RepeatFA(&x86::X86Assembler::vmovaps, "vmovaps {mem}, %{reg}"), "vmovaps_load");
 }
 
+TEST_F(AssemblerX86AVXTest, MovapsLoad) {
+  DriverStr(RepeatFA(&x86::X86Assembler::movaps, "vmovaps {mem}, %{reg}"), "avx_movaps_load");
+}
+
 TEST_F(AssemblerX86Test, MovapsStore) {
   DriverStr(RepeatAF(&x86::X86Assembler::movaps, "movaps %{reg}, {mem}"), "movaps_store");
 }
@@ -517,6 +525,10 @@
   DriverStr(RepeatAF(&x86::X86Assembler::vmovaps, "vmovaps %{reg}, {mem}"), "vmovaps_store");
 }
 
+TEST_F(AssemblerX86AVXTest, MovapsStore) {
+  DriverStr(RepeatAF(&x86::X86Assembler::movaps, "vmovaps %{reg}, {mem}"), "avx_movaps_store");
+}
+
 TEST_F(AssemblerX86Test, MovupsLoad) {
   DriverStr(RepeatFA(&x86::X86Assembler::movups, "movups {mem}, %{reg}"), "movups_load");
 }
@@ -525,6 +537,10 @@
   DriverStr(RepeatFA(&x86::X86Assembler::vmovups, "vmovups {mem}, %{reg}"), "vmovups_load");
 }
 
+TEST_F(AssemblerX86AVXTest, MovupsLoad) {
+  DriverStr(RepeatFA(&x86::X86Assembler::movups, "vmovups {mem}, %{reg}"), "avx_movups_load");
+}
+
 TEST_F(AssemblerX86Test, MovupsStore) {
   DriverStr(RepeatAF(&x86::X86Assembler::movups, "movups %{reg}, {mem}"), "movups_store");
 }
@@ -533,6 +549,10 @@
   DriverStr(RepeatAF(&x86::X86Assembler::vmovups, "vmovups %{reg}, {mem}"), "vmovups_store");
 }
 
+TEST_F(AssemblerX86AVXTest, MovupsStore) {
+  DriverStr(RepeatAF(&x86::X86Assembler::movups, "vmovups %{reg}, {mem}"), "avx_movups_store");
+}
+
 TEST_F(AssemblerX86Test, Movapd) {
   DriverStr(RepeatFF(&x86::X86Assembler::movapd, "movapd %{reg2}, %{reg1}"), "movapd");
 }
@@ -541,6 +561,10 @@
   DriverStr(RepeatFF(&x86::X86Assembler::vmovapd, "vmovapd %{reg2}, %{reg1}"), "vmovapd");
 }
 
+TEST_F(AssemblerX86AVXTest, Movapd) {
+  DriverStr(RepeatFF(&x86::X86Assembler::movapd, "vmovapd %{reg2}, %{reg1}"), "avx_movapd");
+}
+
 TEST_F(AssemblerX86Test, MovapdLoad) {
   DriverStr(RepeatFA(&x86::X86Assembler::movapd, "movapd {mem}, %{reg}"), "movapd_load");
 }
@@ -549,6 +573,10 @@
   DriverStr(RepeatFA(&x86::X86Assembler::vmovapd, "vmovapd {mem}, %{reg}"), "vmovapd_load");
 }
 
+TEST_F(AssemblerX86AVXTest, MovapdLoad) {
+  DriverStr(RepeatFA(&x86::X86Assembler::movapd, "vmovapd {mem}, %{reg}"), "avx_movapd_load");
+}
+
 TEST_F(AssemblerX86Test, MovapdStore) {
   DriverStr(RepeatAF(&x86::X86Assembler::movapd, "movapd %{reg}, {mem}"), "movapd_store");
 }
@@ -557,6 +585,10 @@
   DriverStr(RepeatAF(&x86::X86Assembler::vmovapd, "vmovapd %{reg}, {mem}"), "vmovapd_store");
 }
 
+TEST_F(AssemblerX86AVXTest, MovapdStore) {
+  DriverStr(RepeatAF(&x86::X86Assembler::movapd, "vmovapd %{reg}, {mem}"), "avx_movapd_store");
+}
+
 TEST_F(AssemblerX86Test, MovupdLoad) {
   DriverStr(RepeatFA(&x86::X86Assembler::movupd, "movupd {mem}, %{reg}"), "movupd_load");
 }
@@ -565,6 +597,10 @@
   DriverStr(RepeatFA(&x86::X86Assembler::vmovupd, "vmovupd {mem}, %{reg}"), "vmovupd_load");
 }
 
+TEST_F(AssemblerX86AVXTest, MovupdLoad) {
+  DriverStr(RepeatFA(&x86::X86Assembler::movupd, "vmovupd {mem}, %{reg}"), "avx_movupd_load");
+}
+
 TEST_F(AssemblerX86Test, MovupdStore) {
   DriverStr(RepeatAF(&x86::X86Assembler::movupd, "movupd %{reg}, {mem}"), "movupd_store");
 }
@@ -573,6 +609,10 @@
   DriverStr(RepeatAF(&x86::X86Assembler::vmovupd, "vmovupd %{reg}, {mem}"), "vmovupd_store");
 }
 
+TEST_F(AssemblerX86AVXTest, MovupdStore) {
+  DriverStr(RepeatAF(&x86::X86Assembler::movupd, "vmovupd %{reg}, {mem}"), "avx_movupd_store");
+}
+
 TEST_F(AssemblerX86Test, Movdqa) {
   DriverStr(RepeatFF(&x86::X86Assembler::movdqa, "movdqa %{reg2}, %{reg1}"), "movdqa");
 }
@@ -581,6 +621,10 @@
   DriverStr(RepeatFF(&x86::X86Assembler::vmovdqa, "vmovdqa %{reg2}, %{reg1}"), "vmovdqa");
 }
 
+TEST_F(AssemblerX86AVXTest, Movdqa) {
+  DriverStr(RepeatFF(&x86::X86Assembler::movdqa, "vmovdqa %{reg2}, %{reg1}"), "avx_movdqa");
+}
+
 TEST_F(AssemblerX86Test, MovdqaLoad) {
   DriverStr(RepeatFA(&x86::X86Assembler::movdqa, "movdqa {mem}, %{reg}"), "movdqa_load");
 }
@@ -589,6 +633,10 @@
   DriverStr(RepeatFA(&x86::X86Assembler::vmovdqa, "vmovdqa {mem}, %{reg}"), "vmovdqa_load");
 }
 
+TEST_F(AssemblerX86AVXTest, MovdqaLoad) {
+  DriverStr(RepeatFA(&x86::X86Assembler::movdqa, "vmovdqa {mem}, %{reg}"), "avx_movdqa_load");
+}
+
 TEST_F(AssemblerX86Test, MovdqaStore) {
   DriverStr(RepeatAF(&x86::X86Assembler::movdqa, "movdqa %{reg}, {mem}"), "movdqa_store");
 }
@@ -597,6 +645,10 @@
   DriverStr(RepeatAF(&x86::X86Assembler::vmovdqa, "vmovdqa %{reg}, {mem}"), "vmovdqa_store");
 }
 
+TEST_F(AssemblerX86AVXTest, MovdqaStore) {
+  DriverStr(RepeatAF(&x86::X86Assembler::movdqa, "vmovdqa %{reg}, {mem}"), "avx_movdqa_store");
+}
+
 TEST_F(AssemblerX86Test, MovdquLoad) {
   DriverStr(RepeatFA(&x86::X86Assembler::movdqu, "movdqu {mem}, %{reg}"), "movdqu_load");
 }
@@ -605,6 +657,10 @@
   DriverStr(RepeatFA(&x86::X86Assembler::vmovdqu, "vmovdqu {mem}, %{reg}"), "vmovdqu_load");
 }
 
+TEST_F(AssemblerX86AVXTest, MovdquLoad) {
+  DriverStr(RepeatFA(&x86::X86Assembler::movdqu, "vmovdqu {mem}, %{reg}"), "avx_movdqu_load");
+}
+
 TEST_F(AssemblerX86Test, MovdquStore) {
   DriverStr(RepeatAF(&x86::X86Assembler::movdqu, "movdqu %{reg}, {mem}"), "movdqu_store");
 }
@@ -613,6 +669,10 @@
   DriverStr(RepeatAF(&x86::X86Assembler::vmovdqu, "vmovdqu %{reg}, {mem}"), "vmovdqu_store");
 }
 
+TEST_F(AssemblerX86AVXTest, MovdquStore) {
+  DriverStr(RepeatAF(&x86::X86Assembler::movdqu, "vmovdqu %{reg}, {mem}"), "avx_movdqu_store");
+}
+
 TEST_F(AssemblerX86Test, AddPS) {
   DriverStr(RepeatFF(&x86::X86Assembler::addps, "addps %{reg2}, %{reg1}"), "addps");
 }