Rename art::ReadBarrier::WhiteState as art::ReadBarrier::NonGrayState.
The read barrier state recorded in object's lockword used to be a
three-state value (white/gray/black), which was turned into a
two-state value (white/gray), where the "black" state was conceptually
merged into the "white" state. This change renames the "white" state
as "non-gray" and adjusts corresponding comments.
Test: art/test.py
Change-Id: I2a17ed15651bdbbe99270c1b81b4d78a1c2c132b
diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc
index f624216..d811e07 100644
--- a/compiler/optimizing/code_generator_arm_vixl.cc
+++ b/compiler/optimizing/code_generator_arm_vixl.cc
@@ -899,7 +899,7 @@
// Given the numeric representation, it's enough to check the low bit of the
// rb_state. We do that by shifting the bit out of the lock word with LSRS
// which can be a 16-bit instruction unlike the TST immediate.
- static_assert(ReadBarrier::WhiteState() == 0, "Expecting white to have value 0");
+ static_assert(ReadBarrier::NonGrayState() == 0, "Expecting non-gray to have value 0");
static_assert(ReadBarrier::GrayState() == 1, "Expecting gray to have value 1");
__ Lsrs(temp1_, temp1_, LockWord::kReadBarrierStateShift + 1);
__ B(cc, GetExitLabel()); // Carry flag is the last bit shifted out by LSRS.
@@ -9661,7 +9661,7 @@
// Load the lock word containing the rb_state.
__ Ldr(ip, lock_word);
// Given the numeric representation, it's enough to check the low bit of the rb_state.
- static_assert(ReadBarrier::WhiteState() == 0, "Expecting white to have value 0");
+ static_assert(ReadBarrier::NonGrayState() == 0, "Expecting non-gray to have value 0");
static_assert(ReadBarrier::GrayState() == 1, "Expecting gray to have value 1");
__ Tst(ip, Operand(LockWord::kReadBarrierStateMaskShifted));
__ B(ne, slow_path, /* is_far_target */ false);