ARM64: Pass simd half floating point feature to VIXL macroassembler.
VIXL requires NEONHalf CPUFeature to emit half floating points
NEON instructions.
Test: codegen_test
Change-Id: I797d7a27087103491871e86d283f9860d3f20624
diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc
index 26d07bd..e562a8e 100644
--- a/compiler/optimizing/codegen_test.cc
+++ b/compiler/optimizing/codegen_test.cc
@@ -834,6 +834,7 @@
EXPECT_TRUE(features->Has(vixl::CPUFeatures::kCRC32));
EXPECT_TRUE(features->Has(vixl::CPUFeatures::kDotProduct));
EXPECT_TRUE(features->Has(vixl::CPUFeatures::kFPHalf));
+ EXPECT_TRUE(features->Has(vixl::CPUFeatures::kNEONHalf));
EXPECT_TRUE(features->Has(vixl::CPUFeatures::kAtomics));
}
@@ -847,6 +848,7 @@
EXPECT_TRUE(features->Has(vixl::CPUFeatures::kCRC32));
EXPECT_FALSE(features->Has(vixl::CPUFeatures::kDotProduct));
EXPECT_FALSE(features->Has(vixl::CPUFeatures::kFPHalf));
+ EXPECT_FALSE(features->Has(vixl::CPUFeatures::kNEONHalf));
EXPECT_FALSE(features->Has(vixl::CPUFeatures::kAtomics));
}
diff --git a/compiler/utils/arm64/assembler_arm64.cc b/compiler/utils/arm64/assembler_arm64.cc
index 0523797..d722e00 100644
--- a/compiler/utils/arm64/assembler_arm64.cc
+++ b/compiler/utils/arm64/assembler_arm64.cc
@@ -49,6 +49,7 @@
}
if (art_features->HasFP16()) {
features->Combine(vixl::CPUFeatures::kFPHalf);
+ features->Combine(vixl::CPUFeatures::kNEONHalf);
}
if (art_features->HasLSE()) {
features->Combine(vixl::CPUFeatures::kAtomics);