Reduce namespace pollution.
This leaves us with just the mspace stuff and three libdex functions to clean
up. We deliberately expose the JII API, and I don't think there's anything we
can really do about the art_..._from_code stuff (and at least that starts with
"art_").
Change-Id: I77e58e8330cd2afeb496642302dfe3311e68091a
diff --git a/src/compiler/codegen/arm/ArchFactory.cc b/src/compiler/codegen/arm/ArchFactory.cc
index a68727f..14758b8 100644
--- a/src/compiler/codegen/arm/ArchFactory.cc
+++ b/src/compiler/codegen/arm/ArchFactory.cc
@@ -22,6 +22,8 @@
*
*/
+namespace art {
+
STATIC ArmLIR* genUnconditionalBranch(CompilationUnit*, ArmLIR*);
STATIC ArmLIR* genConditionalBranch(CompilationUnit*, ArmConditionCode,
ArmLIR*);
@@ -110,3 +112,5 @@
oatInsertGrowableList(&cUnit->throwLaunchpads, (intptr_t)tgt);
return branch;
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/ArchUtility.cc b/src/compiler/codegen/arm/ArchUtility.cc
index 5e8fa20..c9a30fd 100644
--- a/src/compiler/codegen/arm/ArchUtility.cc
+++ b/src/compiler/codegen/arm/ArchUtility.cc
@@ -20,6 +20,8 @@
#include <string>
+namespace art {
+
static const char* coreRegNames[16] = {
"r0",
"r1",
@@ -309,7 +311,7 @@
switch(lir->opcode) {
case kArmPseudoMethodEntry:
LOG(INFO) << "-------- method entry " <<
- art::PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
+ PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
break;
case kArmPseudoMethodExit:
LOG(INFO) << "-------- Method_Exit";
@@ -413,7 +415,7 @@
{
LOG(INFO) << "/*";
LOG(INFO) << "Dumping LIR insns for "
- << art::PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
+ << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
LIR* lirInsn;
ArmLIR* armLIR;
int insnsSize = cUnit->insnsSize;
@@ -447,7 +449,7 @@
armLIR->generic.offset, armLIR->generic.offset, armLIR->operands[0]);
}
- const art::DexFile::MethodId& method_id =
+ const DexFile::MethodId& method_id =
cUnit->dex_file->GetMethodId(cUnit->method_idx);
std::string signature(cUnit->dex_file->GetMethodSignature(method_id));
std::string name(cUnit->dex_file->GetMethodName(method_id));
@@ -467,3 +469,5 @@
LOG(INFO) <<" };\n\n";
}
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/ArmLIR.h b/src/compiler/codegen/arm/ArmLIR.h
index 729e708..e77bed3 100644
--- a/src/compiler/codegen/arm/ArmLIR.h
+++ b/src/compiler/codegen/arm/ArmLIR.h
@@ -20,6 +20,8 @@
#include "../../Dalvik.h"
#include "../../CompilerInternals.h"
+namespace art {
+
// Set to 1 to measure cost of suspend check
#define NO_SUSPEND 0
@@ -882,4 +884,6 @@
#define CHAIN_CELL_NORMAL_SIZE 12
#define CHAIN_CELL_PREDICTED_SIZE 16
+} // namespace art
+
#endif // ART_SRC_COMPILER_CODEGEN_ARM_ARMLIR_H_
diff --git a/src/compiler/codegen/arm/ArmRallocUtil.cc b/src/compiler/codegen/arm/ArmRallocUtil.cc
index 60a5f38..a193a7c 100644
--- a/src/compiler/codegen/arm/ArmRallocUtil.cc
+++ b/src/compiler/codegen/arm/ArmRallocUtil.cc
@@ -15,7 +15,7 @@
*/
/*
- * This file contains Arm-specific register alloction support.
+ * This file contains Arm-specific register allocation support.
*/
#include "../../CompilerUtility.h"
@@ -25,6 +25,8 @@
#include "Codegen.h"
#include "../Ralloc.h"
+namespace art {
+
/*
* Placeholder routine until we do proper register allocation.
*/
@@ -263,7 +265,7 @@
/* Return sp-relative offset in bytes using Method* */
-extern int oatVRegOffset(const art::DexFile::CodeItem* code_item,
+extern int oatVRegOffset(const DexFile::CodeItem* code_item,
uint32_t core_spills, uint32_t fp_spills,
size_t frame_size, int reg)
{
@@ -337,3 +339,5 @@
return FPREG(reg) ? &cUnit->regPool->FPRegs[reg & FP_REG_MASK]
: &cUnit->regPool->coreRegs[reg];
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/Assemble.cc b/src/compiler/codegen/arm/Assemble.cc
index a73a27a..83c7a6c 100644
--- a/src/compiler/codegen/arm/Assemble.cc
+++ b/src/compiler/codegen/arm/Assemble.cc
@@ -20,6 +20,8 @@
#include "Codegen.h"
#include <sys/mman.h> /* for protection change */
+namespace art {
+
#define MAX_ASSEMBLER_RETRIES 50
/*
@@ -1594,3 +1596,5 @@
*/
createMappingTable(cUnit);
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/Codegen.h b/src/compiler/codegen/arm/Codegen.h
index 24e2b3e..8d3c425 100644
--- a/src/compiler/codegen/arm/Codegen.h
+++ b/src/compiler/codegen/arm/Codegen.h
@@ -24,6 +24,8 @@
#include "../../CompilerIR.h"
+namespace art {
+
#if defined(_CODEGEN_C)
/*
* loadConstant() sometimes needs to add a small imm to a pre-existing constant
@@ -50,3 +52,5 @@
extern ArmLIR* oatRegCopyNoInsert(CompilationUnit* cUnit, int rDest,
int rSrc);
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/CodegenCommon.cc b/src/compiler/codegen/arm/CodegenCommon.cc
index 9b71b14..26c17ef 100644
--- a/src/compiler/codegen/arm/CodegenCommon.cc
+++ b/src/compiler/codegen/arm/CodegenCommon.cc
@@ -14,6 +14,8 @@
* limitations under the License.
*/
+namespace art {
+
/*
* This file contains codegen and support common to all supported
* ARM variants. It is included by:
@@ -399,3 +401,5 @@
/* Mark all resources as being clobbered */
barrier->defMask = -1;
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/FP/Thumb2VFP.cc b/src/compiler/codegen/arm/FP/Thumb2VFP.cc
index 60cb476..494e09f 100644
--- a/src/compiler/codegen/arm/FP/Thumb2VFP.cc
+++ b/src/compiler/codegen/arm/FP/Thumb2VFP.cc
@@ -14,6 +14,8 @@
* limitations under the License.
*/
+namespace art {
+
STATIC bool genArithOpFloat(CompilationUnit* cUnit, MIR* mir,
RegLocation rlDest, RegLocation rlSrc1,
RegLocation rlSrc2)
@@ -240,3 +242,5 @@
storeValue(cUnit, rlDest, rlResult);
return false;
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/LocalOptimizations.cc b/src/compiler/codegen/arm/LocalOptimizations.cc
index b2bc333..eba701b 100644
--- a/src/compiler/codegen/arm/LocalOptimizations.cc
+++ b/src/compiler/codegen/arm/LocalOptimizations.cc
@@ -19,6 +19,8 @@
#include "ArmLIR.h"
#include "Codegen.h"
+namespace art {
+
#define DEBUG_OPT(X)
/* Check RAW, WAR, and WAR dependency on the register operands */
@@ -446,3 +448,5 @@
applyLoadHoisting(cUnit, (ArmLIR* ) headLIR, (ArmLIR* ) tailLIR);
}
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/MethodCodegenDriver.cc b/src/compiler/codegen/arm/MethodCodegenDriver.cc
index 7ad974c..77b58ff 100644
--- a/src/compiler/codegen/arm/MethodCodegenDriver.cc
+++ b/src/compiler/codegen/arm/MethodCodegenDriver.cc
@@ -16,6 +16,8 @@
#include "object_utils.h"
+namespace art {
+
#define DISPLAY_MISSING_TARGETS (cUnit->enableDebug & \
(1 << kDebugDisplayMissingTargets))
@@ -182,7 +184,7 @@
}
return NULL;
}
- const art::DexFile::FieldId& field_id = cUnit->dex_file->GetFieldId(fieldIdx);
+ const DexFile::FieldId& field_id = cUnit->dex_file->GetFieldId(fieldIdx);
int type_idx = field_id.class_idx_;
Class* klass = cUnit->dex_cache->GetResolvedTypes()->Get(type_idx);
// Check if storage class is the same as class referred to by type idx.
@@ -194,13 +196,13 @@
// See if we can find a dex reference for the storage class.
// we may not if the dex file never references the super class,
// but usually it will.
- std::string descriptor(art::FieldHelper(field).GetDeclaringClassDescriptor());
- const art::DexFile::StringId* string_id =
+ std::string descriptor(FieldHelper(field).GetDeclaringClassDescriptor());
+ const DexFile::StringId* string_id =
cUnit->dex_file->FindStringId(descriptor);
if (string_id == NULL) {
return NULL; // descriptor not found, resort to slow path
}
- const art::DexFile::TypeId* type_id =
+ const DexFile::TypeId* type_id =
cUnit->dex_file->FindTypeId(cUnit->dex_file->GetIndexForStringId(*string_id));
if (type_id == NULL) {
return NULL; // type id not found, resort to slow path
@@ -239,7 +241,7 @@
loadWordDisp(cUnit, rMethod,
Method::DexCacheInitializedStaticStorageOffset().Int32Value(),
rBase);
- loadWordDisp(cUnit, rBase, art::Array::DataOffset().Int32Value() +
+ loadWordDisp(cUnit, rBase, Array::DataOffset().Int32Value() +
sizeof(int32_t*)* typeIdx, rBase);
// TUNING: fast path should fall through
// TUNING: Try a conditional skip here, might be faster
@@ -301,7 +303,7 @@
loadWordDisp(cUnit, rMethod,
Method::DexCacheInitializedStaticStorageOffset().Int32Value(),
rBase);
- loadWordDisp(cUnit, rBase, art::Array::DataOffset().Int32Value() +
+ loadWordDisp(cUnit, rBase, Array::DataOffset().Int32Value() +
sizeof(int32_t*)* typeIdx, rBase);
// TUNING: fast path should fall through
ArmLIR* branchOver = genCmpImmBranch(cUnit, kArmCondNe, rBase, 0);
@@ -353,7 +355,7 @@
loadWordDisp(cUnit, rMethod,
Method::DexCacheInitializedStaticStorageOffset().Int32Value(),
rBase);
- loadWordDisp(cUnit, rBase, art::Array::DataOffset().Int32Value() +
+ loadWordDisp(cUnit, rBase, Array::DataOffset().Int32Value() +
sizeof(int32_t*)* typeIdx, rBase);
// TUNING: fast path should fall through
ArmLIR* branchOver = genCmpImmBranch(cUnit, kArmCondNe, rBase, 0);
@@ -405,7 +407,7 @@
loadWordDisp(cUnit, rMethod,
Method::DexCacheInitializedStaticStorageOffset().Int32Value(),
rBase);
- loadWordDisp(cUnit, rBase, art::Array::DataOffset().Int32Value() +
+ loadWordDisp(cUnit, rBase, Array::DataOffset().Int32Value() +
sizeof(int32_t*)* typeIdx, rBase);
// TUNING: fast path should fall through
ArmLIR* branchOver = genCmpImmBranch(cUnit, kArmCondNe, rBase, 0);
@@ -453,9 +455,9 @@
break;
case 2: // Grab target method* and target code_
loadWordDisp(cUnit, r0,
- art::CodeAndDirectMethods::CodeOffsetInBytes(idx), rLR);
+ CodeAndDirectMethods::CodeOffsetInBytes(idx), rLR);
loadWordDisp(cUnit, r0,
- art::CodeAndDirectMethods::MethodOffsetInBytes(idx), r0);
+ CodeAndDirectMethods::MethodOffsetInBytes(idx), r0);
break;
default:
return -1;
@@ -502,7 +504,7 @@
break;
case 3: // Get target method [use rLR, set r0]
loadWordDisp(cUnit, rLR, (target_idx * 4) +
- art::Array::DataOffset().Int32Value(), r0);
+ Array::DataOffset().Int32Value(), r0);
break;
case 4: // Get the target compiled code address [uses r0, sets rLR]
loadWordDisp(cUnit, r0, Method::GetCodeOffset().Int32Value(), rLR);
@@ -537,7 +539,7 @@
break;
case 2: // method->dex_cache_resolved_methods_->Get(method_idx)
loadWordDisp(cUnit, rLR, (dInsn->vB * 4) +
- art::Array::DataOffset().Int32Value(), rLR);
+ Array::DataOffset().Int32Value(), rLR);
break;
case 3: // Resolved?
skipBranch = genCmpImmBranch(cUnit, kArmCondNe, rLR, 0);
@@ -569,10 +571,10 @@
case 5:
// get this->klass_->vtable_ [usr rLR, set rLR]
loadWordDisp(cUnit, rLR, Class::VTableOffset().Int32Value(), rLR);
- DCHECK_EQ((art::Array::DataOffset().Int32Value() & 0x3), 0);
+ DCHECK_EQ((Array::DataOffset().Int32Value() & 0x3), 0);
// In load shadow fold vtable_ object header size into method_index_
opRegImm(cUnit, kOpAdd, r0,
- art::Array::DataOffset().Int32Value() / 4);
+ Array::DataOffset().Int32Value() / 4);
// Get target Method*
loadBaseIndexed(cUnit, rLR, r0, r0, 2, kWord);
break;
@@ -648,7 +650,7 @@
* that the check to verify that the target method index falls
* within the size of the super's vtable has been done at compile-time.
*/
- art::ClassLinker* class_linker = art::Runtime::Current()->GetClassLinker();
+ ClassLinker* class_linker = Runtime::Current()->GetClassLinker();
Method* baseMethod = class_linker->ResolveMethod(*cUnit->dex_file,
dInsn->vB,
cUnit->dex_cache,
@@ -685,7 +687,7 @@
break;
case 3: // Get target method [use rLR, set r0]
loadWordDisp(cUnit, rLR, (target_idx * 4) +
- art::Array::DataOffset().Int32Value(), r0);
+ Array::DataOffset().Int32Value(), r0);
break;
case 4: // Get the target compiled code address [uses r0, sets rLR]
loadWordDisp(cUnit, r0, Method::GetCodeOffset().Int32Value(), rLR);
@@ -722,7 +724,7 @@
break;
case 2: // method->dex_cache_resolved_methods_->Get(meth_idx) [u/s rLR]
loadWordDisp(cUnit, rLR, (dInsn->vB * 4) +
- art::Array::DataOffset().Int32Value(), rLR);
+ Array::DataOffset().Int32Value(), rLR);
break;
case 3: // Resolved?
skipBranch = genCmpImmBranch(cUnit, kArmCondNe, rLR, 0);
@@ -757,14 +759,14 @@
if (!(mir->optimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
// Range check, throw NSM on failure
tReg = oatAllocTemp(cUnit);
- loadWordDisp(cUnit, r0, art::Array::LengthOffset().Int32Value(),
+ loadWordDisp(cUnit, r0, Array::LengthOffset().Int32Value(),
tReg);
genRegRegCheck(cUnit, kArmCondCs, rLR, tReg, mir,
kArmThrowNoSuchMethod);
oatFreeTemp(cUnit, tReg);
}
// Adjust vtable_ base past object header
- opRegImm(cUnit, kOpAdd, r0, art::Array::DataOffset().Int32Value());
+ opRegImm(cUnit, kOpAdd, r0, Array::DataOffset().Int32Value());
// Get target Method*
loadBaseIndexed(cUnit, r0, rLR, r0, 2, kWord);
break;
@@ -1068,7 +1070,7 @@
DecodedInstruction* dInsn = &mir->dalvikInsn;
int callState = 0;
ArmLIR* rollback;
- art::ClassLinker* class_linker = art::Runtime::Current()->GetClassLinker();
+ ClassLinker* class_linker = Runtime::Current()->GetClassLinker();
Method* baseMethod = class_linker->ResolveMethod(*cUnit->dex_file,
dInsn->vB,
cUnit->dex_cache,
@@ -1143,7 +1145,7 @@
DecodedInstruction* dInsn = &mir->dalvikInsn;
int callState = 0;
ArmLIR* rollback;
- art::ClassLinker* class_linker = art::Runtime::Current()->GetClassLinker();
+ ClassLinker* class_linker = Runtime::Current()->GetClassLinker();
Method* method = class_linker->ResolveMethod(*cUnit->dex_file,
dInsn->vB,
cUnit->dex_cache,
@@ -1966,12 +1968,12 @@
*/
bool skipOverflowCheck = ((cUnit->attrs & METHOD_IS_LEAF) &&
((size_t)cUnit->frameSize <
- art::Thread::kStackOverflowReservedBytes));
+ Thread::kStackOverflowReservedBytes));
newLIR0(cUnit, kArmPseudoMethodEntry);
if (!skipOverflowCheck) {
/* Load stack limit */
loadWordDisp(cUnit, rSELF,
- art::Thread::StackEndOffset().Int32Value(), r12);
+ Thread::StackEndOffset().Int32Value(), r12);
}
/* Spill core callee saves */
newLIR1(cUnit, kThumb2Push, cUnit->coreSpillMask);
@@ -2148,7 +2150,7 @@
loadWordDisp(cUnit, rSELF,
OFFSETOF_MEMBER(Thread, pTestSuspendFromCode), rLR);
loadWordDisp(cUnit, rSELF,
- art::Thread::SuspendCountOffset().Int32Value(), rSUSPEND);
+ Thread::SuspendCountOffset().Int32Value(), rSUSPEND);
opReg(cUnit, kOpBlx, rLR);
genUnconditionalBranch(cUnit, resumeLab);
}
@@ -2289,3 +2291,5 @@
{
storeBaseDispWide(cUnit, rBase, displacement, rSrcLo, rSrcHi);
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/Thumb2/Factory.cc b/src/compiler/codegen/arm/Thumb2/Factory.cc
index 1ea565a..ebc30f8 100644
--- a/src/compiler/codegen/arm/Thumb2/Factory.cc
+++ b/src/compiler/codegen/arm/Thumb2/Factory.cc
@@ -14,6 +14,8 @@
* limitations under the License.
*/
+namespace art {
+
/*
* This file contains codegen for the Thumb ISA and is intended to be
* includes by:
@@ -1156,3 +1158,5 @@
}
}
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/Thumb2/Gen.cc b/src/compiler/codegen/arm/Thumb2/Gen.cc
index 0afbe41..9c4ef1e 100644
--- a/src/compiler/codegen/arm/Thumb2/Gen.cc
+++ b/src/compiler/codegen/arm/Thumb2/Gen.cc
@@ -33,14 +33,16 @@
#define EXERCISE_RESOLVE_METHOD (cUnit->enableDebug & \
(1 << kDebugExerciseResolveMethod))
+namespace art {
+
STATIC RegLocation getRetLoc(CompilationUnit* cUnit);
void warnIfUnresolved(CompilationUnit* cUnit, int fieldIdx, Field* field) {
if (field == NULL) {
- const art::DexFile::FieldId& field_id = cUnit->dex_file->GetFieldId(fieldIdx);
+ const DexFile::FieldId& field_id = cUnit->dex_file->GetFieldId(fieldIdx);
std::string class_name(cUnit->dex_file->GetFieldDeclaringClassDescriptor(field_id));
std::string field_name(cUnit->dex_file->GetFieldName(field_id));
- LOG(INFO) << "Field " << art::PrettyDescriptor(class_name) << "." << field_name
+ LOG(INFO) << "Field " << PrettyDescriptor(class_name) << "." << field_name
<< " unresolved at compile time";
} else {
// We also use the slow path for wide volatile fields.
@@ -419,7 +421,7 @@
loadCurrMethodDirect(cUnit, r1); // arg1 <= Method*
loadWordDisp(cUnit, r1,
Method::DexCacheResolvedFieldsOffset().Int32Value(), r0);
- loadWordDisp(cUnit, r0, art::Array::DataOffset().Int32Value() +
+ loadWordDisp(cUnit, r0, Array::DataOffset().Int32Value() +
sizeof(int32_t*)* fieldIdx, r0);
/*
* For testing, omit the test for run-time resolution. This will
@@ -443,7 +445,7 @@
oatFreeTemp(cUnit, r1);
oatFreeTemp(cUnit, r2);
oatFreeTemp(cUnit, r3);
- loadWordDisp(cUnit, r0, art::Field::OffsetOffset().Int32Value(), r0);
+ loadWordDisp(cUnit, r0, Field::OffsetOffset().Int32Value(), r0);
}
STATIC void genIGet(CompilationUnit* cUnit, MIR* mir, OpSize size,
@@ -2108,3 +2110,5 @@
LOG(INFO) << "dalvik.vm.oat.op = " << buf;
}
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/Thumb2/Ralloc.cc b/src/compiler/codegen/arm/Thumb2/Ralloc.cc
index 63d2430..59c1aa6 100644
--- a/src/compiler/codegen/arm/Thumb2/Ralloc.cc
+++ b/src/compiler/codegen/arm/Thumb2/Ralloc.cc
@@ -14,6 +14,8 @@
* limitations under the License.
*/
+namespace art {
+
/*
* This file contains codegen for the Thumb ISA and is intended to be
* includes by:
@@ -49,3 +51,5 @@
return oatAllocTempFloat(cUnit);
return oatAllocTemp(cUnit);
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/armv7-a-neon/ArchVariant.cc b/src/compiler/codegen/arm/armv7-a-neon/ArchVariant.cc
index ee56369..eafe5ed 100644
--- a/src/compiler/codegen/arm/armv7-a-neon/ArchVariant.cc
+++ b/src/compiler/codegen/arm/armv7-a-neon/ArchVariant.cc
@@ -14,6 +14,8 @@
* limitations under the License.
*/
+namespace art {
+
/*
* Determine the initial instruction set to be used for this trace.
* Later components may decide to change this.
@@ -49,3 +51,5 @@
dmb->defMask = ENCODE_ALL;
#endif
}
+
+} // namespace art
diff --git a/src/compiler/codegen/arm/armv7-a/ArchVariant.cc b/src/compiler/codegen/arm/armv7-a/ArchVariant.cc
index 609d73b..eafe5ed 100644
--- a/src/compiler/codegen/arm/armv7-a/ArchVariant.cc
+++ b/src/compiler/codegen/arm/armv7-a/ArchVariant.cc
@@ -14,6 +14,7 @@
* limitations under the License.
*/
+namespace art {
/*
* Determine the initial instruction set to be used for this trace.
@@ -50,3 +51,5 @@
dmb->defMask = ENCODE_ALL;
#endif
}
+
+} // namespace art