ART: Introduce compiler data type.
Replace most uses of the runtime's Primitive in compiler
with a new class DataType. This prepares for introducing
new types, such as Uint8, that the runtime does not need
to know about.
Test: m test-art-host-gtest
Test: testrunner.py --host
Bug: 23964345
Change-Id: Iec2ad82454eec678fffcd8279a9746b90feb9b0c
diff --git a/compiler/optimizing/code_generator_vector_x86.cc b/compiler/optimizing/code_generator_vector_x86.cc
index 5a012e7..6515dbe 100644
--- a/compiler/optimizing/code_generator_vector_x86.cc
+++ b/compiler/optimizing/code_generator_vector_x86.cc
@@ -30,23 +30,23 @@
HInstruction* input = instruction->InputAt(0);
bool is_zero = IsZeroBitPattern(input);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimLong:
+ case DataType::Type::kInt64:
// Long needs extra temporary to load from the register pair.
if (!is_zero) {
locations->AddTemp(Location::RequiresFpuRegister());
}
FALLTHROUGH_INTENDED;
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
locations->SetInAt(0, is_zero ? Location::ConstantLocation(input->AsConstant())
: Location::RequiresRegister());
locations->SetOut(Location::RequiresFpuRegister());
break;
- case Primitive::kPrimFloat:
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat32:
+ case DataType::Type::kFloat64:
locations->SetInAt(0, is_zero ? Location::ConstantLocation(input->AsConstant())
: Location::RequiresFpuRegister());
locations->SetOut(is_zero ? Location::RequiresFpuRegister()
@@ -69,27 +69,27 @@
}
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
DCHECK_EQ(16u, instruction->GetVectorLength());
__ movd(dst, locations->InAt(0).AsRegister<Register>());
__ punpcklbw(dst, dst);
__ punpcklwd(dst, dst);
__ pshufd(dst, dst, Immediate(0));
break;
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ movd(dst, locations->InAt(0).AsRegister<Register>());
__ punpcklwd(dst, dst);
__ pshufd(dst, dst, Immediate(0));
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ movd(dst, locations->InAt(0).AsRegister<Register>());
__ pshufd(dst, dst, Immediate(0));
break;
- case Primitive::kPrimLong: {
+ case DataType::Type::kInt64: {
XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
DCHECK_EQ(2u, instruction->GetVectorLength());
__ movd(dst, locations->InAt(0).AsRegisterPairLow<Register>());
@@ -98,12 +98,12 @@
__ punpcklqdq(dst, dst);
break;
}
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK(locations->InAt(0).Equals(locations->Out()));
DCHECK_EQ(4u, instruction->GetVectorLength());
__ shufps(dst, dst, Immediate(0));
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK(locations->InAt(0).Equals(locations->Out()));
DCHECK_EQ(2u, instruction->GetVectorLength());
__ shufpd(dst, dst, Immediate(0));
@@ -117,20 +117,20 @@
void LocationsBuilderX86::VisitVecExtractScalar(HVecExtractScalar* instruction) {
LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimLong:
+ case DataType::Type::kInt64:
// Long needs extra temporary to store into the register pair.
locations->AddTemp(Location::RequiresFpuRegister());
FALLTHROUGH_INTENDED;
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
locations->SetInAt(0, Location::RequiresFpuRegister());
locations->SetOut(Location::RequiresRegister());
break;
- case Primitive::kPrimFloat:
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat32:
+ case DataType::Type::kFloat64:
locations->SetInAt(0, Location::RequiresFpuRegister());
locations->SetOut(Location::SameAsFirstInput());
break;
@@ -144,18 +144,18 @@
LocationSummary* locations = instruction->GetLocations();
XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort: // TODO: up to here, and?
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16: // TODO: up to here, and?
LOG(FATAL) << "Unsupported SIMD type";
UNREACHABLE();
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_LE(4u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 16u);
__ movd(locations->Out().AsRegister<Register>(), src);
break;
- case Primitive::kPrimLong: {
+ case DataType::Type::kInt64: {
XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
DCHECK_EQ(2u, instruction->GetVectorLength());
__ movd(locations->Out().AsRegisterPairLow<Register>(), src);
@@ -163,8 +163,8 @@
__ movd(locations->Out().AsRegisterPairHigh<Register>(), tmp);
break;
}
- case Primitive::kPrimFloat:
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat32:
+ case DataType::Type::kFloat64:
DCHECK_LE(2u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 4u);
DCHECK(locations->InAt(0).Equals(locations->Out())); // no code required
@@ -179,14 +179,14 @@
static void CreateVecUnOpLocations(ArenaAllocator* arena, HVecUnaryOperation* instruction) {
LocationSummary* locations = new (arena) LocationSummary(instruction);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
- case Primitive::kPrimFloat:
- case Primitive::kPrimDouble:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
+ case DataType::Type::kFloat32:
+ case DataType::Type::kFloat64:
locations->SetInAt(0, Location::RequiresFpuRegister());
locations->SetOut(Location::RequiresFpuRegister());
break;
@@ -199,7 +199,7 @@
void LocationsBuilderX86::VisitVecReduce(HVecReduce* instruction) {
CreateVecUnOpLocations(GetGraph()->GetArena(), instruction);
// Long reduction or min/max require a temporary.
- if (instruction->GetPackedType() == Primitive::kPrimLong ||
+ if (instruction->GetPackedType() == DataType::Type::kInt64 ||
instruction->GetKind() == HVecReduce::kMin ||
instruction->GetKind() == HVecReduce::kMax) {
instruction->GetLocations()->AddTemp(Location::RequiresFpuRegister());
@@ -211,7 +211,7 @@
XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
switch (instruction->GetKind()) {
case HVecReduce::kSum:
@@ -241,7 +241,7 @@
}
}
break;
- case Primitive::kPrimLong: {
+ case DataType::Type::kInt64: {
DCHECK_EQ(2u, instruction->GetVectorLength());
XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
switch (instruction->GetKind()) {
@@ -271,9 +271,9 @@
LocationSummary* locations = instruction->GetLocations();
XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
- Primitive::Type from = instruction->GetInputType();
- Primitive::Type to = instruction->GetResultType();
- if (from == Primitive::kPrimInt && to == Primitive::kPrimFloat) {
+ DataType::Type from = instruction->GetInputType();
+ DataType::Type to = instruction->GetResultType();
+ if (from == DataType::Type::kInt32 && to == DataType::Type::kFloat32) {
DCHECK_EQ(4u, instruction->GetVectorLength());
__ cvtdq2ps(dst, src);
} else {
@@ -290,33 +290,33 @@
XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimByte:
+ case DataType::Type::kInt8:
DCHECK_EQ(16u, instruction->GetVectorLength());
__ pxor(dst, dst);
__ psubb(dst, src);
break;
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ pxor(dst, dst);
__ psubw(dst, src);
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ pxor(dst, dst);
__ psubd(dst, src);
break;
- case Primitive::kPrimLong:
+ case DataType::Type::kInt64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ pxor(dst, dst);
__ psubq(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ xorps(dst, dst);
__ subps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ xorpd(dst, dst);
__ subpd(dst, src);
@@ -330,7 +330,7 @@
void LocationsBuilderX86::VisitVecAbs(HVecAbs* instruction) {
CreateVecUnOpLocations(GetGraph()->GetArena(), instruction);
// Integral-abs requires a temporary for the comparison.
- if (instruction->GetPackedType() == Primitive::kPrimInt) {
+ if (instruction->GetPackedType() == DataType::Type::kInt32) {
instruction->GetLocations()->AddTemp(Location::RequiresFpuRegister());
}
}
@@ -340,7 +340,7 @@
XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimInt: {
+ case DataType::Type::kInt32: {
DCHECK_EQ(4u, instruction->GetVectorLength());
XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
__ movaps(dst, src);
@@ -350,13 +350,13 @@
__ psubd(dst, tmp);
break;
}
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ pcmpeqb(dst, dst); // all ones
__ psrld(dst, Immediate(1));
__ andps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ pcmpeqb(dst, dst); // all ones
__ psrlq(dst, Immediate(1));
@@ -371,7 +371,7 @@
void LocationsBuilderX86::VisitVecNot(HVecNot* instruction) {
CreateVecUnOpLocations(GetGraph()->GetArena(), instruction);
// Boolean-not requires a temporary to construct the 16 x one.
- if (instruction->GetPackedType() == Primitive::kPrimBoolean) {
+ if (instruction->GetPackedType() == DataType::Type::kBool) {
instruction->GetLocations()->AddTemp(Location::RequiresFpuRegister());
}
}
@@ -381,7 +381,7 @@
XmmRegister src = locations->InAt(0).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean: { // special case boolean-not
+ case DataType::Type::kBool: { // special case boolean-not
DCHECK_EQ(16u, instruction->GetVectorLength());
XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
__ pxor(dst, dst);
@@ -390,22 +390,22 @@
__ pxor(dst, src);
break;
}
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
DCHECK_LE(2u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 16u);
__ pcmpeqb(dst, dst); // all ones
__ pxor(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ pcmpeqb(dst, dst); // all ones
__ xorps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ pcmpeqb(dst, dst); // all ones
__ xorpd(dst, src);
@@ -420,14 +420,14 @@
static void CreateVecBinOpLocations(ArenaAllocator* arena, HVecBinaryOperation* instruction) {
LocationSummary* locations = new (arena) LocationSummary(instruction);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
- case Primitive::kPrimFloat:
- case Primitive::kPrimDouble:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
+ case DataType::Type::kFloat32:
+ case DataType::Type::kFloat64:
locations->SetInAt(0, Location::RequiresFpuRegister());
locations->SetInAt(1, Location::RequiresFpuRegister());
locations->SetOut(Location::SameAsFirstInput());
@@ -448,28 +448,28 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimByte:
+ case DataType::Type::kInt8:
DCHECK_EQ(16u, instruction->GetVectorLength());
__ paddb(dst, src);
break;
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ paddw(dst, src);
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ paddd(dst, src);
break;
- case Primitive::kPrimLong:
+ case DataType::Type::kInt64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ paddq(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ addps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ addpd(dst, src);
break;
@@ -493,12 +493,12 @@
DCHECK(instruction->IsUnsigned());
switch (instruction->GetPackedType()) {
- case Primitive::kPrimByte:
+ case DataType::Type::kInt8:
DCHECK_EQ(16u, instruction->GetVectorLength());
__ pavgb(dst, src);
return;
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ pavgw(dst, src);
return;
@@ -518,28 +518,28 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimByte:
+ case DataType::Type::kInt8:
DCHECK_EQ(16u, instruction->GetVectorLength());
__ psubb(dst, src);
break;
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ psubw(dst, src);
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ psubd(dst, src);
break;
- case Primitive::kPrimLong:
+ case DataType::Type::kInt64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ psubq(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ subps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ subpd(dst, src);
break;
@@ -559,20 +559,20 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ pmullw(dst, src);
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ pmulld(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ mulps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ mulpd(dst, src);
break;
@@ -592,11 +592,11 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ divps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ divpd(dst, src);
break;
@@ -616,7 +616,7 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimByte:
+ case DataType::Type::kInt8:
DCHECK_EQ(16u, instruction->GetVectorLength());
if (instruction->IsUnsigned()) {
__ pminub(dst, src);
@@ -624,8 +624,8 @@
__ pminsb(dst, src);
}
break;
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
if (instruction->IsUnsigned()) {
__ pminuw(dst, src);
@@ -633,7 +633,7 @@
__ pminsw(dst, src);
}
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
if (instruction->IsUnsigned()) {
__ pminud(dst, src);
@@ -642,12 +642,12 @@
}
break;
// Next cases are sloppy wrt 0.0 vs -0.0.
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
DCHECK(!instruction->IsUnsigned());
__ minps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
DCHECK(!instruction->IsUnsigned());
__ minpd(dst, src);
@@ -668,7 +668,7 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimByte:
+ case DataType::Type::kInt8:
DCHECK_EQ(16u, instruction->GetVectorLength());
if (instruction->IsUnsigned()) {
__ pmaxub(dst, src);
@@ -676,8 +676,8 @@
__ pmaxsb(dst, src);
}
break;
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
if (instruction->IsUnsigned()) {
__ pmaxuw(dst, src);
@@ -685,7 +685,7 @@
__ pmaxsw(dst, src);
}
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
if (instruction->IsUnsigned()) {
__ pmaxud(dst, src);
@@ -694,12 +694,12 @@
}
break;
// Next cases are sloppy wrt 0.0 vs -0.0.
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
DCHECK(!instruction->IsUnsigned());
__ maxps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
DCHECK(!instruction->IsUnsigned());
__ maxpd(dst, src);
@@ -720,21 +720,21 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
DCHECK_LE(2u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 16u);
__ pand(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ andps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ andpd(dst, src);
break;
@@ -754,21 +754,21 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
DCHECK_LE(2u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 16u);
__ pandn(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ andnps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ andnpd(dst, src);
break;
@@ -788,21 +788,21 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
DCHECK_LE(2u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 16u);
__ por(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ orps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ orpd(dst, src);
break;
@@ -822,21 +822,21 @@
XmmRegister src = locations->InAt(1).AsFpuRegister<XmmRegister>();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
DCHECK_LE(2u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 16u);
__ pxor(dst, src);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ xorps(dst, src);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ xorpd(dst, src);
break;
@@ -850,10 +850,10 @@
static void CreateVecShiftLocations(ArenaAllocator* arena, HVecBinaryOperation* instruction) {
LocationSummary* locations = new (arena) LocationSummary(instruction);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
locations->SetInAt(0, Location::RequiresFpuRegister());
locations->SetInAt(1, Location::ConstantLocation(instruction->InputAt(1)->AsConstant()));
locations->SetOut(Location::SameAsFirstInput());
@@ -874,16 +874,16 @@
int32_t value = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ psllw(dst, Immediate(static_cast<uint8_t>(value)));
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ pslld(dst, Immediate(static_cast<uint8_t>(value)));
break;
- case Primitive::kPrimLong:
+ case DataType::Type::kInt64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ psllq(dst, Immediate(static_cast<uint8_t>(value)));
break;
@@ -903,12 +903,12 @@
int32_t value = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ psraw(dst, Immediate(static_cast<uint8_t>(value)));
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ psrad(dst, Immediate(static_cast<uint8_t>(value)));
break;
@@ -928,16 +928,16 @@
int32_t value = locations->InAt(1).GetConstant()->AsIntConstant()->GetValue();
XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>();
switch (instruction->GetPackedType()) {
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
DCHECK_EQ(8u, instruction->GetVectorLength());
__ psrlw(dst, Immediate(static_cast<uint8_t>(value)));
break;
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ psrld(dst, Immediate(static_cast<uint8_t>(value)));
break;
- case Primitive::kPrimLong:
+ case DataType::Type::kInt64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ psrlq(dst, Immediate(static_cast<uint8_t>(value)));
break;
@@ -956,23 +956,23 @@
bool is_zero = IsZeroBitPattern(input);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimLong:
+ case DataType::Type::kInt64:
// Long needs extra temporary to load from register pairs.
if (!is_zero) {
locations->AddTemp(Location::RequiresFpuRegister());
}
FALLTHROUGH_INTENDED;
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
locations->SetInAt(0, is_zero ? Location::ConstantLocation(input->AsConstant())
: Location::RequiresRegister());
locations->SetOut(Location::RequiresFpuRegister());
break;
- case Primitive::kPrimFloat:
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat32:
+ case DataType::Type::kFloat64:
locations->SetInAt(0, is_zero ? Location::ConstantLocation(input->AsConstant())
: Location::RequiresFpuRegister());
locations->SetOut(Location::RequiresFpuRegister());
@@ -999,17 +999,17 @@
// Set required elements.
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort: // TODO: up to here, and?
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16: // TODO: up to here, and?
LOG(FATAL) << "Unsupported SIMD type";
UNREACHABLE();
- case Primitive::kPrimInt:
+ case DataType::Type::kInt32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ movd(dst, locations->InAt(0).AsRegister<Register>());
break;
- case Primitive::kPrimLong: {
+ case DataType::Type::kInt64: {
XmmRegister tmp = locations->GetTemp(0).AsFpuRegister<XmmRegister>();
DCHECK_EQ(2u, instruction->GetVectorLength());
__ xorps(tmp, tmp);
@@ -1018,11 +1018,11 @@
__ punpckldq(dst, tmp);
break;
}
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
__ movss(dst, locations->InAt(1).AsFpuRegister<XmmRegister>());
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
__ movsd(dst, locations->InAt(1).AsFpuRegister<XmmRegister>());
break;
@@ -1036,11 +1036,11 @@
static void CreateVecAccumLocations(ArenaAllocator* arena, HVecOperation* instruction) {
LocationSummary* locations = new (arena) LocationSummary(instruction);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
locations->SetInAt(0, Location::RequiresFpuRegister());
locations->SetInAt(1, Location::RequiresFpuRegister());
locations->SetInAt(2, Location::RequiresFpuRegister());
@@ -1076,14 +1076,14 @@
bool is_load) {
LocationSummary* locations = new (arena) LocationSummary(instruction);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
- case Primitive::kPrimFloat:
- case Primitive::kPrimDouble:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
+ case DataType::Type::kFloat32:
+ case DataType::Type::kFloat64:
locations->SetInAt(0, Location::RequiresRegister());
locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1)));
if (is_load) {
@@ -1126,12 +1126,12 @@
void InstructionCodeGeneratorX86::VisitVecLoad(HVecLoad* instruction) {
LocationSummary* locations = instruction->GetLocations();
- size_t size = Primitive::ComponentSize(instruction->GetPackedType());
+ size_t size = DataType::Size(instruction->GetPackedType());
Address address = VecAddress(locations, size, instruction->IsStringCharAt());
XmmRegister reg = locations->Out().AsFpuRegister<XmmRegister>();
bool is_aligned16 = instruction->GetAlignment().IsAlignedAt(16);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimChar:
+ case DataType::Type::kUint16:
DCHECK_EQ(8u, instruction->GetVectorLength());
// Special handling of compressed/uncompressed string load.
if (mirror::kUseStringCompression && instruction->IsStringCharAt()) {
@@ -1155,20 +1155,20 @@
return;
}
FALLTHROUGH_INTENDED;
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
DCHECK_LE(2u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 16u);
is_aligned16 ? __ movdqa(reg, address) : __ movdqu(reg, address);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
is_aligned16 ? __ movaps(reg, address) : __ movups(reg, address);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
is_aligned16 ? __ movapd(reg, address) : __ movupd(reg, address);
break;
@@ -1184,26 +1184,26 @@
void InstructionCodeGeneratorX86::VisitVecStore(HVecStore* instruction) {
LocationSummary* locations = instruction->GetLocations();
- size_t size = Primitive::ComponentSize(instruction->GetPackedType());
+ size_t size = DataType::Size(instruction->GetPackedType());
Address address = VecAddress(locations, size, /*is_string_char_at*/ false);
XmmRegister reg = locations->InAt(2).AsFpuRegister<XmmRegister>();
bool is_aligned16 = instruction->GetAlignment().IsAlignedAt(16);
switch (instruction->GetPackedType()) {
- case Primitive::kPrimBoolean:
- case Primitive::kPrimByte:
- case Primitive::kPrimChar:
- case Primitive::kPrimShort:
- case Primitive::kPrimInt:
- case Primitive::kPrimLong:
+ case DataType::Type::kBool:
+ case DataType::Type::kInt8:
+ case DataType::Type::kUint16:
+ case DataType::Type::kInt16:
+ case DataType::Type::kInt32:
+ case DataType::Type::kInt64:
DCHECK_LE(2u, instruction->GetVectorLength());
DCHECK_LE(instruction->GetVectorLength(), 16u);
is_aligned16 ? __ movdqa(address, reg) : __ movdqu(address, reg);
break;
- case Primitive::kPrimFloat:
+ case DataType::Type::kFloat32:
DCHECK_EQ(4u, instruction->GetVectorLength());
is_aligned16 ? __ movaps(address, reg) : __ movups(address, reg);
break;
- case Primitive::kPrimDouble:
+ case DataType::Type::kFloat64:
DCHECK_EQ(2u, instruction->GetVectorLength());
is_aligned16 ? __ movapd(address, reg) : __ movupd(address, reg);
break;