Eliminate redundant x86 compare for GenDivZeroCheck
For x86, the ALU operations on general purpose registers update the flags.
Thus, when generating the zero check for divide/remainder operations, the
compare is not needed.
Change-Id: I07bfdf7d5491d3e3e9d98a932472d7f18d5b46d3
Signed-off-by: Razvan A Lupusoru <razvan.a.lupusoru@intel.com>
diff --git a/compiler/dex/quick/mir_to_lir.h b/compiler/dex/quick/mir_to_lir.h
index 2a25f2f..9dc35c6 100644
--- a/compiler/dex/quick/mir_to_lir.h
+++ b/compiler/dex/quick/mir_to_lir.h
@@ -682,7 +682,15 @@
bool is_div) = 0;
virtual void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2) = 0;
+
+ /**
+ * @brief Used for generating code that throws ArithmeticException if both registers are zero.
+ * @details This is used for generating DivideByZero checks when divisor is held in two separate registers.
+ * @param reg_lo The register holding the lower 32-bits.
+ * @param reg_hi The register holding the upper 32-bits.
+ */
virtual void GenDivZeroCheck(int reg_lo, int reg_hi) = 0;
+
virtual void GenEntrySequence(RegLocation* ArgLocs,
RegLocation rl_method) = 0;
virtual void GenExitSequence() = 0;
diff --git a/compiler/dex/quick/x86/int_x86.cc b/compiler/dex/quick/x86/int_x86.cc
index 2c646d4..75eddd6 100644
--- a/compiler/dex/quick/x86/int_x86.cc
+++ b/compiler/dex/quick/x86/int_x86.cc
@@ -454,9 +454,17 @@
}
void X86Mir2Lir::GenDivZeroCheck(int reg_lo, int reg_hi) {
+ // We are not supposed to clobber either of the provided registers, so allocate
+ // a temporary to use for the check.
int t_reg = AllocTemp();
+
+ // Doing an OR is a quick way to check if both registers are zero. This will set the flags.
OpRegRegReg(kOpOr, t_reg, reg_lo, reg_hi);
- GenImmedCheck(kCondEq, t_reg, 0, kThrowDivZero);
+
+ // In case of zero, throw ArithmeticException.
+ GenCheck(kCondEq, kThrowDivZero);
+
+ // The temp is no longer needed so free it at this time.
FreeTemp(t_reg);
}