commit 0758ae7c12df9f857b8609e1eab6ad5dfa0e517d
author Lena Djokic <Lena.Djokic@imgtec.com> Tue May 23 11:06:23 2017 +0200
committer Lena Djokic <Lena.Djokic@imgtec.com> Thu Jun 08 10:56:46 2017 +0200
tree cbceef23999bd640e36c052ce2accbab0a81dc22
parent 4d3df9131c4098828f889b9470c82880efdc91be

Introduce a number of MSA instructions for MIPS32

Added a number of MSA (The MIPS SIMD Architecture) instructions.
Added assembler tests for each instruction.

Test: mma test-art-host-gtest

Change-Id: I1d499309fc08923484f64d1883b9c3f95eadd3be

compiler/utils/mips/constants_mips.h

diff --git a/compiler/utils/mips/constants_mips.h b/compiler/utils/mips/constants_mips.h
index 44ed5cc..b4dfdbd 100644
--- a/compiler/utils/mips/constants_mips.h
+++ b/compiler/utils/mips/constants_mips.h
@@ -75,8 +75,37 @@
   kFdShift = 6,
   kFdBits = 5,
 
+  kMsaOperationShift = 23,
+  kMsaELMOperationShift = 22,
+  kMsa2ROperationShift = 18,
+  kMsa2RFOperationShift = 17,
+  kDfShift = 21,
+  kDfMShift = 16,
+  kDf2RShift = 16,
+  kDfNShift = 16,
+  kWtShift = 16,
+  kWtBits = 5,
+  kWsShift = 11,
+  kWsBits = 5,
+  kWdShift = 6,
+  kWdBits = 5,
+  kS10Shift = 16,
+  kI10Shift = 11,
+  kS10MinorShift = 2,
+
   kBranchOffsetMask = 0x0000ffff,
   kJumpOffsetMask = 0x03ffffff,
+
+  kMsaMajorOpcode = 0x1e,
+  kMsaDfMByteMask = 0x70,
+  kMsaDfMHalfwordMask = 0x60,
+  kMsaDfMWordMask = 0x40,
+  kMsaDfMDoublewordMask = 0x00,
+  kMsaDfNByteMask = 0x00,
+  kMsaDfNHalfwordMask = 0x20,
+  kMsaDfNWordMask = 0x30,
+  kMsaDfNDoublewordMask = 0x38,
+  kMsaS10Mask = 0x3ff,
 };
 
 enum ScaleFactor {