Remove MIPS support from libelffile.
Test: m
Change-Id: I01e6c6abb845baa4763929f5b9b6b3b36ac0e8b0
diff --git a/compiler/debug/dwarf/dwarf_test.cc b/compiler/debug/dwarf/dwarf_test.cc
index 5946af8..95d9e93 100644
--- a/compiler/debug/dwarf/dwarf_test.cc
+++ b/compiler/debug/dwarf/dwarf_test.cc
@@ -146,7 +146,7 @@
}
// Test x86_64 register mapping. It is the only non-trivial architecture.
-// ARM, X86, and Mips have: dwarf_reg = art_reg + constant.
+// ARM and X86 have: dwarf_reg = art_reg + constant.
TEST_F(DwarfTest, x86_64_RegisterMapping) {
constexpr bool is64bit = true;
DebugFrameOpCodeWriter<> opcodes;
diff --git a/compiler/utils/assembler.h b/compiler/utils/assembler.h
index 0744aec2..1199602 100644
--- a/compiler/utils/assembler.h
+++ b/compiler/utils/assembler.h
@@ -371,6 +371,7 @@
// the instructions that can trigger signals into branch delay slots. Handling
// signals from instructions in delay slots is a bit problematic and should be
// avoided.
+ // TODO: Re-evaluate whether we still need this now that MIPS support has been removed.
virtual size_t CodePosition() { return CodeSize(); }
// Copy instructions out of assembly buffer into the given region of memory
diff --git a/libelffile/dwarf/register.h b/libelffile/dwarf/register.h
index eadb441..7742ec4 100644
--- a/libelffile/dwarf/register.h
+++ b/libelffile/dwarf/register.h
@@ -40,10 +40,6 @@
static Reg ArmDp(int num) { return Reg(256 + num); } // D0–D31.
static Reg Arm64Core(int num) { return Reg(num); } // X0-X31.
static Reg Arm64Fp(int num) { return Reg(64 + num); } // V0-V31.
- static Reg MipsCore(int num) { return Reg(num); }
- static Reg Mips64Core(int num) { return Reg(num); }
- static Reg MipsFp(int num) { return Reg(32 + num); }
- static Reg Mips64Fp(int num) { return Reg(32 + num); }
static Reg X86Core(int num) { return Reg(num); }
static Reg X86Fp(int num) { return Reg(21 + num); }
static Reg X86_64Core(int num) {
diff --git a/libelffile/elf/elf_utils.h b/libelffile/elf/elf_utils.h
index a20312a..181dd10 100644
--- a/libelffile/elf/elf_utils.h
+++ b/libelffile/elf/elf_utils.h
@@ -62,14 +62,9 @@
// Architecture dependent flags for the ELF header.
#define EF_ARM_EABI_VER5 0x05000000
-#define EF_MIPS_ABI_O32 0x00001000
-#define EF_MIPS_ARCH_32R2 0x70000000
-#define EF_MIPS_ARCH_32R6 0x90000000
-#define EF_MIPS_ARCH_64R6 0xa0000000
#define EI_ABIVERSION 8
#define EM_ARM 40
-#define EF_MIPS_NOREORDER 1
#define STV_DEFAULT 0
#define EM_AARCH64 183
@@ -82,24 +77,6 @@
#define DT_RUNPATH 29
#define DT_FLAGS 30
-/* MIPS dependent d_tag field for Elf32_Dyn. */
-#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime Linker Interface ID */
-#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */
-#define DT_MIPS_ICHECKSUM 0x70000003 /* Cksum of ext. str. and com. sizes */
-#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */
-#define DT_MIPS_FLAGS 0x70000005 /* Flags */
-#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Segment base address */
-#define DT_MIPS_CONFLICT 0x70000008 /* Adr of .conflict section */
-#define DT_MIPS_LIBLIST 0x70000009 /* Address of .liblist section */
-#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local .GOT entries */
-#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of .conflict entries */
-#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of .liblist entries */
-#define DT_MIPS_SYMTABNO 0x70000011 /* Number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */
-#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in .dynsym */
-#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */
-#define DT_MIPS_RLD_MAP 0x70000016 /* Address of debug map pointer */
-
// Patching section type
#define SHT_OAT_PATCH SHT_LOUSER
@@ -107,7 +84,9 @@
sym->st_info = (b << 4) + (t & 0x0f);
}
-static inline bool IsDynamicSectionPointer(Elf32_Word d_tag, Elf32_Word e_machine) {
+static inline bool IsDynamicSectionPointer(Elf32_Word d_tag,
+ Elf32_Word e_machine ATTRIBUTE_UNUSED) {
+ // TODO: Remove the `e_machine` parameter from API (not needed after Mips target was removed).
switch (d_tag) {
// case 1: well known d_tag values that imply Elf32_Dyn.d_un contains an address in d_ptr
case DT_PLTGOT:
@@ -158,35 +137,7 @@
if ((DT_ENCODING < d_tag && d_tag < DT_LOOS)
|| (DT_LOOS < d_tag && d_tag < DT_HIOS)
|| (DT_LOPROC < d_tag && d_tag < DT_HIPROC)) {
- // Special case for MIPS which breaks the regular rules between DT_LOPROC and DT_HIPROC
- if (e_machine == EM_MIPS) {
- switch (d_tag) {
- case DT_MIPS_RLD_VERSION:
- case DT_MIPS_TIME_STAMP:
- case DT_MIPS_ICHECKSUM:
- case DT_MIPS_IVERSION:
- case DT_MIPS_FLAGS:
- case DT_MIPS_LOCAL_GOTNO:
- case DT_MIPS_CONFLICTNO:
- case DT_MIPS_LIBLISTNO:
- case DT_MIPS_SYMTABNO:
- case DT_MIPS_UNREFEXTNO:
- case DT_MIPS_GOTSYM:
- case DT_MIPS_HIPAGENO: {
- return false;
- }
- case DT_MIPS_BASE_ADDRESS:
- case DT_MIPS_CONFLICT:
- case DT_MIPS_LIBLIST:
- case DT_MIPS_RLD_MAP: {
- return true;
- }
- default: {
- LOG(FATAL) << "Unknown MIPS d_tag value 0x" << std::hex << d_tag;
- return false;
- }
- }
- } else if ((d_tag % 2) == 0) {
+ if ((d_tag % 2) == 0) {
return true;
} else {
return false;