commit 027f0ff64c2512b9a5f1f54f3fea1bec481eb0f5
author Douglas Leung <douglas.leung@imgtec.com> Fri Feb 27 19:05:03 2015 -0800
committer Andreas Gampe <agampe@google.com> Fri Mar 20 16:51:56 2015 -0700
tree 9202535f219d7343b4c26d5c43f0bcb7c31650df
parent 6cc763c8b8157fb42dd44e1dfb84812546500dc1

ART: Add Mips32r6 backend support

Add Mips32r6 compiler support.

Don't use deprecated Mips32r2 instructions if running in Mips32r6
mode.

Change-Id: I54e689aa8c026ccb75c4af515aa2794f471c9f67

disassembler/disassembler_mips.cc

diff --git a/disassembler/disassembler_mips.cc b/disassembler/disassembler_mips.cc
index 3d8a567..b27b555 100644
--- a/disassembler/disassembler_mips.cc
+++ b/disassembler/disassembler_mips.cc
@@ -71,10 +71,14 @@
   { kRTypeMask, 17, "mthi", "S", },
   { kRTypeMask, 18, "mflo", "D", },
   { kRTypeMask, 19, "mtlo", "S", },
-  { kRTypeMask, 24, "mult", "ST", },
-  { kRTypeMask, 25, "multu", "ST", },
-  { kRTypeMask, 26, "div", "ST", },
-  { kRTypeMask, 27, "divu", "ST", },
+  { kRTypeMask | (0x1f << 6), 24, "mult", "ST", },
+  { kRTypeMask | (0x1f << 6), 25, "multu", "ST", },
+  { kRTypeMask | (0x1f << 6), 26, "div", "ST", },
+  { kRTypeMask | (0x1f << 6), 27, "divu", "ST", },
+  { kRTypeMask | (0x1f << 6), 24 + (2 << 6), "mul", "DST", },
+  { kRTypeMask | (0x1f << 6), 24 + (3 << 6), "muh", "DST", },
+  { kRTypeMask | (0x1f << 6), 26 + (2 << 6), "div", "DST", },
+  { kRTypeMask | (0x1f << 6), 26 + (3 << 6), "mod", "DST", },
   { kRTypeMask, 32, "add", "DST", },
   { kRTypeMask, 33, "addu", "DST", },
   { kRTypeMask, 34, "sub", "DST", },