commit 009568fc43b9597e215a3495f7a906eb5cd7a077
author Andra Danciu <andradanciu@google.com> Fri Sep 11 13:35:03 2020 +0000
committer Orion Hodson <oth@google.com> Mon Sep 14 14:25:12 2020 +0000
tree e249c4ab41a662b6778115784d623dc236ae5932
parent 19a73a22227bb6b47ba2e7c1a45e07148492a26f

X86: Add tests for cmpxchgw and cmpxchgb

The two instructions were added in a previous commit and were needed for
VarHandle.compareAndSet intrinsic.

Test: m art_compiler_host_tests
Bug: 65872996
Change-Id: If2a9d8d1a4c40034d16e2082f2e5948bcdfbab21

compiler/utils/x86/assembler_x86.h

diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h
index 2fe3b7b..ba92867 100644
--- a/compiler/utils/x86/assembler_x86.h
+++ b/compiler/utils/x86/assembler_x86.h
@@ -814,12 +814,24 @@
   void LoadLongConstant(XmmRegister dst, int64_t value);
   void LoadDoubleConstant(XmmRegister dst, double value);
 
+  void LockCmpxchgb(const Address& address, Register reg) {
+    // For testing purpose
+    lock()->cmpxchgb(address, static_cast<ByteRegister>(reg));
+  }
+
   void LockCmpxchgb(const Address& address, ByteRegister reg) {
     lock()->cmpxchgb(address, reg);
   }
 
   void LockCmpxchgw(const Address& address, Register reg) {
-    lock()->cmpxchgw(address, reg);
+    AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+    // We make sure that the operand size override bytecode is emited before the lock bytecode.
+    // We test against clang which enforces this bytecode order.
+    EmitOperandSizeOverride();
+    EmitUint8(0xF0);
+    EmitUint8(0x0F);
+    EmitUint8(0xB1);
+    EmitOperand(reg, address);
   }
 
   void LockCmpxchgl(const Address& address, Register reg) {

compiler/utils/x86/assembler_x86_test.cc

diff --git a/compiler/utils/x86/assembler_x86_test.cc b/compiler/utils/x86/assembler_x86_test.cc
index 5d34a51..305f3c4 100644
--- a/compiler/utils/x86/assembler_x86_test.cc
+++ b/compiler/utils/x86/assembler_x86_test.cc
@@ -114,6 +114,11 @@
       tertiary_register_names_.emplace(x86::Register(x86::EBX), "bl");
       tertiary_register_names_.emplace(x86::Register(x86::ECX), "cl");
       tertiary_register_names_.emplace(x86::Register(x86::EDX), "dl");
+      // FIXME: Refactor RepeatAw() to only use the tertiary for EAX, EBX, ECX, EDX
+      tertiary_register_names_.emplace(x86::Register(x86::EBP), "ch");
+      tertiary_register_names_.emplace(x86::Register(x86::ESP), "ah");
+      tertiary_register_names_.emplace(x86::Register(x86::ESI), "dh");
+      tertiary_register_names_.emplace(x86::Register(x86::EDI), "bh");
     }
 
     if (fp_registers_.size() == 0) {
@@ -322,6 +327,16 @@
   DriverStr(expected, "LoadLongConstant");
 }
 
+TEST_F(AssemblerX86Test, LockCmpxchgb) {
+  DriverStr(RepeatAw(&x86::X86Assembler::LockCmpxchgb,
+                     "lock cmpxchgb %{reg}, {mem}"), "lock_cmpxchgb");
+}
+
+TEST_F(AssemblerX86Test, LockCmpxchgw) {
+  DriverStr(RepeatAr(&x86::X86Assembler::LockCmpxchgw,
+                     "lock cmpxchgw %{reg}, {mem}"), "lock_cmpxchgw");
+}
+
 TEST_F(AssemblerX86Test, LockCmpxchgl) {
   DriverStr(RepeatAR(&x86::X86Assembler::LockCmpxchgl,
                      "lock cmpxchgl %{reg}, {mem}"), "lock_cmpxchgl");