tree 7c5159dd08ef78189302ef7669ddd532b6dd09cc
parent c149dcb5c60bfea8871f16dfcc0690255eeb825f
author Mengdong Lin <mengdong.lin@intel.com> 1404378143 +0800
committer Takashi Iwai <tiwai@suse.de> 1404452842 +0200

ALSA: hda - restore BCLK M/N value as per CDCLK for HSW/BDW display HDA controller

For HSW/BDW display HD-A controller, hda_set_bclk() is defined to set BCLK
by programming the M/N values as per the core display clock (CDCLK) queried from
i915 display driver.

And the audio driver will also set BCLK in azx_first_init() since the display
driver can turn off the shared power in boot phase if only eDP is connected
and M/N values will be lost and must be reprogrammed.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Takashi Iwai <tiwai@suse.de>