blob: 3f9399c278691ab8348a1ab195f5fd154b0a9a7b [file] [log] [blame]
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +02001/*
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +01002 * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R,
3 * AD5627, AD5627R, AD5628, AD5629R, AD5645R, AD5647R, AD5648, AD5665, AD5665R,
4 * AD5666, AD5667, AD5667R, AD5668, AD5669R, LTC2606, LTC2607, LTC2609, LTC2616,
Mike Looijmansb2d2d2b2017-05-08 09:26:24 +02005 * LTC2617, LTC2619, LTC2626, LTC2627, LTC2629, LTC2631, LTC2633, LTC2635
6 * Digital to analog converters driver
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +02007 *
8 * Copyright 2011 Analog Devices Inc.
9 *
10 * Licensed under the GPL-2.
11 */
12
13#include <linux/device.h>
14#include <linux/err.h>
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/spi/spi.h>
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +020018#include <linux/i2c.h>
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020019#include <linux/slab.h>
20#include <linux/sysfs.h>
21#include <linux/regulator/consumer.h>
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +020022#include <asm/unaligned.h>
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020023
Jonathan Cameron06458e22012-04-25 15:54:58 +010024#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020026
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +010027#define AD5064_MAX_DAC_CHANNELS 8
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +010028#define AD5064_MAX_VREFS 4
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020029
30#define AD5064_ADDR(x) ((x) << 20)
31#define AD5064_CMD(x) ((x) << 24)
32
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020033#define AD5064_ADDR_ALL_DAC 0xF
34
35#define AD5064_CMD_WRITE_INPUT_N 0x0
36#define AD5064_CMD_UPDATE_DAC_N 0x1
37#define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
38#define AD5064_CMD_WRITE_INPUT_N_UPDATE_N 0x3
39#define AD5064_CMD_POWERDOWN_DAC 0x4
40#define AD5064_CMD_CLEAR 0x5
41#define AD5064_CMD_LDAC_MASK 0x6
42#define AD5064_CMD_RESET 0x7
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +010043#define AD5064_CMD_CONFIG 0x8
44
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +010045#define AD5064_CMD_RESET_V2 0x5
46#define AD5064_CMD_CONFIG_V2 0x7
47
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +010048#define AD5064_CONFIG_DAISY_CHAIN_ENABLE BIT(1)
49#define AD5064_CONFIG_INT_VREF_ENABLE BIT(0)
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020050
51#define AD5064_LDAC_PWRDN_NONE 0x0
52#define AD5064_LDAC_PWRDN_1K 0x1
53#define AD5064_LDAC_PWRDN_100K 0x2
54#define AD5064_LDAC_PWRDN_3STATE 0x3
55
56/**
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +010057 * enum ad5064_regmap_type - Register layout variant
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +010058 * @AD5064_REGMAP_ADI: Old Analog Devices register map layout
59 * @AD5064_REGMAP_ADI2: New Analog Devices register map layout
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +010060 * @AD5064_REGMAP_LTC: LTC register map layout
61 */
62enum ad5064_regmap_type {
63 AD5064_REGMAP_ADI,
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +010064 AD5064_REGMAP_ADI2,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +010065 AD5064_REGMAP_LTC,
66};
67
68/**
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020069 * struct ad5064_chip_info - chip specific information
70 * @shared_vref: whether the vref supply is shared between channels
Marc Andre78f585f2016-02-08 18:01:46 +010071 * @internal_vref: internal reference voltage. 0 if the chip has no
72 internal vref.
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020073 * @channel: channel specification
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +010074 * @num_channels: number of channels
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +010075 * @regmap_type: register map layout variant
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +010076 */
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020077
78struct ad5064_chip_info {
79 bool shared_vref;
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +010080 unsigned long internal_vref;
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +010081 const struct iio_chan_spec *channels;
82 unsigned int num_channels;
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +010083 enum ad5064_regmap_type regmap_type;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020084};
85
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +020086struct ad5064_state;
87
88typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
89 unsigned int addr, unsigned int val);
90
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020091/**
92 * struct ad5064_state - driver instance specific data
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +020093 * @dev: the device for this driver instance
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +020094 * @chip_info: chip model specific constants, available modes etc
95 * @vref_reg: vref supply regulators
96 * @pwr_down: whether channel is powered down
97 * @pwr_down_mode: channel's current power down mode
98 * @dac_cache: current DAC raw value (chip does not support readback)
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +010099 * @use_internal_vref: set to true if the internal reference voltage should be
100 * used.
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200101 * @write: register write callback
102 * @data: i2c/spi transfer buffers
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200103 */
104
105struct ad5064_state {
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200106 struct device *dev;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200107 const struct ad5064_chip_info *chip_info;
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100108 struct regulator_bulk_data vref_reg[AD5064_MAX_VREFS];
109 bool pwr_down[AD5064_MAX_DAC_CHANNELS];
110 u8 pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
111 unsigned int dac_cache[AD5064_MAX_DAC_CHANNELS];
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100112 bool use_internal_vref;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200113
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200114 ad5064_write_func write;
115
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200116 /*
117 * DMA (thus cache coherency maintenance) requires the
118 * transfer buffers to live in their own cache lines.
119 */
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200120 union {
121 u8 i2c[3];
122 __be32 spi;
123 } data ____cacheline_aligned;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200124};
125
126enum ad5064_type {
127 ID_AD5024,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100128 ID_AD5025,
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200129 ID_AD5044,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100130 ID_AD5045,
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200131 ID_AD5064,
132 ID_AD5064_1,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100133 ID_AD5065,
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100134 ID_AD5625,
135 ID_AD5625R_1V25,
136 ID_AD5625R_2V5,
137 ID_AD5627,
138 ID_AD5627R_1V25,
139 ID_AD5627R_2V5,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100140 ID_AD5628_1,
141 ID_AD5628_2,
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200142 ID_AD5629_1,
143 ID_AD5629_2,
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100144 ID_AD5645R_1V25,
145 ID_AD5645R_2V5,
146 ID_AD5647R_1V25,
147 ID_AD5647R_2V5,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100148 ID_AD5648_1,
149 ID_AD5648_2,
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100150 ID_AD5665,
151 ID_AD5665R_1V25,
152 ID_AD5665R_2V5,
Lars-Peter Clausen64f4eaa2012-02-21 18:38:17 +0100153 ID_AD5666_1,
154 ID_AD5666_2,
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100155 ID_AD5667,
156 ID_AD5667R_1V25,
157 ID_AD5667R_2V5,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100158 ID_AD5668_1,
159 ID_AD5668_2,
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200160 ID_AD5669_1,
161 ID_AD5669_2,
Marc Andre8d144c92016-02-08 18:01:47 +0100162 ID_LTC2606,
163 ID_LTC2607,
164 ID_LTC2609,
165 ID_LTC2616,
166 ID_LTC2617,
167 ID_LTC2619,
168 ID_LTC2626,
169 ID_LTC2627,
170 ID_LTC2629,
Mike Looijmansb2d2d2b2017-05-08 09:26:24 +0200171 ID_LTC2631_L12,
172 ID_LTC2631_H12,
173 ID_LTC2631_L10,
174 ID_LTC2631_H10,
175 ID_LTC2631_L8,
176 ID_LTC2631_H8,
177 ID_LTC2633_L12,
178 ID_LTC2633_H12,
179 ID_LTC2633_L10,
180 ID_LTC2633_H10,
181 ID_LTC2633_L8,
182 ID_LTC2633_H8,
183 ID_LTC2635_L12,
184 ID_LTC2635_H12,
185 ID_LTC2635_L10,
186 ID_LTC2635_H10,
187 ID_LTC2635_L8,
188 ID_LTC2635_H8,
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200189};
190
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200191static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200192 unsigned int addr, unsigned int val, unsigned int shift)
193{
194 val <<= shift;
195
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200196 return st->write(st, cmd, addr, val);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200197}
198
199static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000200 const struct iio_chan_spec *chan)
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200201{
Marc Andre78f585f2016-02-08 18:01:46 +0100202 unsigned int val, address;
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100203 unsigned int shift;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200204 int ret;
205
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100206 if (st->chip_info->regmap_type == AD5064_REGMAP_LTC) {
Marc Andre78f585f2016-02-08 18:01:46 +0100207 val = 0;
208 address = chan->address;
209 } else {
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100210 if (st->chip_info->regmap_type == AD5064_REGMAP_ADI2)
211 shift = 4;
212 else
213 shift = 8;
214
Marc Andre78f585f2016-02-08 18:01:46 +0100215 val = (0x1 << chan->address);
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100216 address = 0;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200217
Marc Andre78f585f2016-02-08 18:01:46 +0100218 if (st->pwr_down[chan->channel])
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100219 val |= st->pwr_down_mode[chan->channel] << shift;
Marc Andre78f585f2016-02-08 18:01:46 +0100220 }
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200221
Marc Andre78f585f2016-02-08 18:01:46 +0100222 ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, address, val, 0);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200223
224 return ret;
225}
226
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200227static const char * const ad5064_powerdown_modes[] = {
228 "1kohm_to_gnd",
229 "100kohm_to_gnd",
230 "three_state",
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200231};
232
Marc Andre8d144c92016-02-08 18:01:47 +0100233static const char * const ltc2617_powerdown_modes[] = {
234 "90kohm_to_gnd",
235};
236
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200237static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
238 const struct iio_chan_spec *chan)
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100239{
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200240 struct ad5064_state *st = iio_priv(indio_dev);
241
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200242 return st->pwr_down_mode[chan->channel] - 1;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200243}
244
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200245static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
246 const struct iio_chan_spec *chan, unsigned int mode)
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200247{
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200248 struct ad5064_state *st = iio_priv(indio_dev);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200249 int ret;
250
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200251 mutex_lock(&indio_dev->mlock);
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200252 st->pwr_down_mode[chan->channel] = mode + 1;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200253
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000254 ret = ad5064_sync_powerdown_mode(st, chan);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200255 mutex_unlock(&indio_dev->mlock);
256
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200257 return ret;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200258}
259
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200260static const struct iio_enum ad5064_powerdown_mode_enum = {
261 .items = ad5064_powerdown_modes,
262 .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
263 .get = ad5064_get_powerdown_mode,
264 .set = ad5064_set_powerdown_mode,
265};
266
Marc Andre8d144c92016-02-08 18:01:47 +0100267static const struct iio_enum ltc2617_powerdown_mode_enum = {
268 .items = ltc2617_powerdown_modes,
269 .num_items = ARRAY_SIZE(ltc2617_powerdown_modes),
270 .get = ad5064_get_powerdown_mode,
271 .set = ad5064_set_powerdown_mode,
272};
273
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100274static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
Michael Hennerichfc6d1132012-04-27 10:58:36 +0200275 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200276{
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200277 struct ad5064_state *st = iio_priv(indio_dev);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200278
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100279 return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200280}
281
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100282static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
Michael Hennerichfc6d1132012-04-27 10:58:36 +0200283 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
284 size_t len)
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200285{
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200286 struct ad5064_state *st = iio_priv(indio_dev);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200287 bool pwr_down;
288 int ret;
289
290 ret = strtobool(buf, &pwr_down);
291 if (ret)
292 return ret;
293
294 mutex_lock(&indio_dev->mlock);
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100295 st->pwr_down[chan->channel] = pwr_down;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200296
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000297 ret = ad5064_sync_powerdown_mode(st, chan);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200298 mutex_unlock(&indio_dev->mlock);
299 return ret ? ret : len;
300}
301
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100302static int ad5064_get_vref(struct ad5064_state *st,
303 struct iio_chan_spec const *chan)
304{
305 unsigned int i;
306
307 if (st->use_internal_vref)
308 return st->chip_info->internal_vref;
309
310 i = st->chip_info->shared_vref ? 0 : chan->channel;
311 return regulator_get_voltage(st->vref_reg[i].consumer);
312}
313
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200314static int ad5064_read_raw(struct iio_dev *indio_dev,
315 struct iio_chan_spec const *chan,
316 int *val,
317 int *val2,
318 long m)
319{
320 struct ad5064_state *st = iio_priv(indio_dev);
Dan Carpenter23a3b8c2011-10-29 10:20:42 +0300321 int scale_uv;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200322
323 switch (m) {
Jonathan Cameron09f4eb42012-04-15 17:41:19 +0100324 case IIO_CHAN_INFO_RAW:
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200325 *val = st->dac_cache[chan->channel];
326 return IIO_VAL_INT;
Jonathan Cameronc8a9f802011-10-26 17:41:36 +0100327 case IIO_CHAN_INFO_SCALE:
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100328 scale_uv = ad5064_get_vref(st, chan);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200329 if (scale_uv < 0)
330 return scale_uv;
331
Lars-Peter Clausen25682ae2013-09-28 10:31:00 +0100332 *val = scale_uv / 1000;
333 *val2 = chan->scan_type.realbits;
334 return IIO_VAL_FRACTIONAL_LOG2;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200335 default:
336 break;
337 }
338 return -EINVAL;
339}
340
341static int ad5064_write_raw(struct iio_dev *indio_dev,
342 struct iio_chan_spec const *chan, int val, int val2, long mask)
343{
344 struct ad5064_state *st = iio_priv(indio_dev);
345 int ret;
346
347 switch (mask) {
Jonathan Cameron09f4eb42012-04-15 17:41:19 +0100348 case IIO_CHAN_INFO_RAW:
Lars-Peter Clausenc5ef7172013-03-01 13:07:00 +0000349 if (val >= (1 << chan->scan_type.realbits) || val < 0)
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200350 return -EINVAL;
351
352 mutex_lock(&indio_dev->mlock);
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200353 ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200354 chan->address, val, chan->scan_type.shift);
355 if (ret == 0)
356 st->dac_cache[chan->channel] = val;
357 mutex_unlock(&indio_dev->mlock);
358 break;
359 default:
360 ret = -EINVAL;
361 }
362
363 return ret;
364}
365
366static const struct iio_info ad5064_info = {
367 .read_raw = ad5064_read_raw,
368 .write_raw = ad5064_write_raw,
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200369 .driver_module = THIS_MODULE,
370};
371
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200372static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100373 {
374 .name = "powerdown",
375 .read = ad5064_read_dac_powerdown,
376 .write = ad5064_write_dac_powerdown,
Jonathan Cameron37044322013-09-08 14:57:00 +0100377 .shared = IIO_SEPARATE,
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100378 },
Jonathan Cameron37044322013-09-08 14:57:00 +0100379 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5064_powerdown_mode_enum),
Lars-Peter Clausen26628f62012-06-04 11:36:12 +0200380 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100381 { },
382};
383
Marc Andre8d144c92016-02-08 18:01:47 +0100384static const struct iio_chan_spec_ext_info ltc2617_ext_info[] = {
385 {
386 .name = "powerdown",
387 .read = ad5064_read_dac_powerdown,
388 .write = ad5064_write_dac_powerdown,
389 .shared = IIO_SEPARATE,
390 },
391 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ltc2617_powerdown_mode_enum),
392 IIO_ENUM_AVAILABLE("powerdown_mode", &ltc2617_powerdown_mode_enum),
393 { },
394};
395
Marc Andre78f585f2016-02-08 18:01:46 +0100396#define AD5064_CHANNEL(chan, addr, bits, _shift, _ext_info) { \
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100397 .type = IIO_VOLTAGE, \
398 .indexed = 1, \
399 .output = 1, \
400 .channel = (chan), \
Jonathan Cameron20a0edd2013-02-27 19:08:37 +0000401 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
402 BIT(IIO_CHAN_INFO_SCALE), \
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000403 .address = addr, \
Jonathan Cameron81d49bc2013-12-11 18:45:00 +0000404 .scan_type = { \
405 .sign = 'u', \
406 .realbits = (bits), \
407 .storagebits = 16, \
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200408 .shift = (_shift), \
Jonathan Cameron81d49bc2013-12-11 18:45:00 +0000409 }, \
Marc Andre78f585f2016-02-08 18:01:46 +0100410 .ext_info = (_ext_info), \
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100411}
412
Marc Andre78f585f2016-02-08 18:01:46 +0100413#define DECLARE_AD5064_CHANNELS(name, bits, shift, ext_info) \
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100414const struct iio_chan_spec name[] = { \
Marc Andre78f585f2016-02-08 18:01:46 +0100415 AD5064_CHANNEL(0, 0, bits, shift, ext_info), \
416 AD5064_CHANNEL(1, 1, bits, shift, ext_info), \
417 AD5064_CHANNEL(2, 2, bits, shift, ext_info), \
418 AD5064_CHANNEL(3, 3, bits, shift, ext_info), \
419 AD5064_CHANNEL(4, 4, bits, shift, ext_info), \
420 AD5064_CHANNEL(5, 5, bits, shift, ext_info), \
421 AD5064_CHANNEL(6, 6, bits, shift, ext_info), \
422 AD5064_CHANNEL(7, 7, bits, shift, ext_info), \
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000423}
424
Marc Andre78f585f2016-02-08 18:01:46 +0100425#define DECLARE_AD5065_CHANNELS(name, bits, shift, ext_info) \
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000426const struct iio_chan_spec name[] = { \
Marc Andre78f585f2016-02-08 18:01:46 +0100427 AD5064_CHANNEL(0, 0, bits, shift, ext_info), \
428 AD5064_CHANNEL(1, 3, bits, shift, ext_info), \
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100429}
430
Marc Andre78f585f2016-02-08 18:01:46 +0100431static DECLARE_AD5064_CHANNELS(ad5024_channels, 12, 8, ad5064_ext_info);
432static DECLARE_AD5064_CHANNELS(ad5044_channels, 14, 6, ad5064_ext_info);
433static DECLARE_AD5064_CHANNELS(ad5064_channels, 16, 4, ad5064_ext_info);
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100434
Marc Andre78f585f2016-02-08 18:01:46 +0100435static DECLARE_AD5065_CHANNELS(ad5025_channels, 12, 8, ad5064_ext_info);
436static DECLARE_AD5065_CHANNELS(ad5045_channels, 14, 6, ad5064_ext_info);
437static DECLARE_AD5065_CHANNELS(ad5065_channels, 16, 4, ad5064_ext_info);
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200438
Marc Andre78f585f2016-02-08 18:01:46 +0100439static DECLARE_AD5064_CHANNELS(ad5629_channels, 12, 4, ad5064_ext_info);
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100440static DECLARE_AD5064_CHANNELS(ad5645_channels, 14, 2, ad5064_ext_info);
Marc Andre78f585f2016-02-08 18:01:46 +0100441static DECLARE_AD5064_CHANNELS(ad5669_channels, 16, 0, ad5064_ext_info);
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000442
Marc Andre8d144c92016-02-08 18:01:47 +0100443static DECLARE_AD5064_CHANNELS(ltc2607_channels, 16, 0, ltc2617_ext_info);
444static DECLARE_AD5064_CHANNELS(ltc2617_channels, 14, 2, ltc2617_ext_info);
445static DECLARE_AD5064_CHANNELS(ltc2627_channels, 12, 4, ltc2617_ext_info);
Mike Looijmansb2d2d2b2017-05-08 09:26:24 +0200446#define ltc2631_12_channels ltc2627_channels
447static DECLARE_AD5064_CHANNELS(ltc2631_10_channels, 10, 6, ltc2617_ext_info);
448static DECLARE_AD5064_CHANNELS(ltc2631_8_channels, 8, 8, ltc2617_ext_info);
449
450#define LTC2631_INFO(vref, pchannels, nchannels) \
451 { \
452 .shared_vref = true, \
453 .internal_vref = vref, \
454 .channels = pchannels, \
455 .num_channels = nchannels, \
456 .regmap_type = AD5064_REGMAP_LTC, \
457 }
458
Marc Andre8d144c92016-02-08 18:01:47 +0100459
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100460static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
461 [ID_AD5024] = {
462 .shared_vref = false,
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100463 .channels = ad5024_channels,
464 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100465 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100466 },
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100467 [ID_AD5025] = {
468 .shared_vref = false,
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000469 .channels = ad5025_channels,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100470 .num_channels = 2,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100471 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100472 },
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100473 [ID_AD5044] = {
474 .shared_vref = false,
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100475 .channels = ad5044_channels,
476 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100477 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100478 },
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100479 [ID_AD5045] = {
480 .shared_vref = false,
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000481 .channels = ad5045_channels,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100482 .num_channels = 2,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100483 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100484 },
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100485 [ID_AD5064] = {
486 .shared_vref = false,
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100487 .channels = ad5064_channels,
488 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100489 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100490 },
491 [ID_AD5064_1] = {
492 .shared_vref = true,
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100493 .channels = ad5064_channels,
494 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100495 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100496 },
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100497 [ID_AD5065] = {
498 .shared_vref = false,
Lars-Peter Clausena2630262013-03-01 13:07:00 +0000499 .channels = ad5065_channels,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100500 .num_channels = 2,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100501 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100502 },
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100503 [ID_AD5625] = {
504 .shared_vref = true,
505 .channels = ad5629_channels,
506 .num_channels = 4,
507 .regmap_type = AD5064_REGMAP_ADI2
508 },
509 [ID_AD5625R_1V25] = {
510 .shared_vref = true,
511 .internal_vref = 1250000,
512 .channels = ad5629_channels,
513 .num_channels = 4,
514 .regmap_type = AD5064_REGMAP_ADI2
515 },
516 [ID_AD5625R_2V5] = {
517 .shared_vref = true,
518 .internal_vref = 2500000,
519 .channels = ad5629_channels,
520 .num_channels = 4,
521 .regmap_type = AD5064_REGMAP_ADI2
522 },
523 [ID_AD5627] = {
524 .shared_vref = true,
525 .channels = ad5629_channels,
526 .num_channels = 2,
527 .regmap_type = AD5064_REGMAP_ADI2
528 },
529 [ID_AD5627R_1V25] = {
530 .shared_vref = true,
531 .internal_vref = 1250000,
532 .channels = ad5629_channels,
533 .num_channels = 2,
534 .regmap_type = AD5064_REGMAP_ADI2
535 },
536 [ID_AD5627R_2V5] = {
537 .shared_vref = true,
538 .internal_vref = 2500000,
539 .channels = ad5629_channels,
540 .num_channels = 2,
541 .regmap_type = AD5064_REGMAP_ADI2
542 },
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100543 [ID_AD5628_1] = {
544 .shared_vref = true,
545 .internal_vref = 2500000,
546 .channels = ad5024_channels,
547 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100548 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100549 },
550 [ID_AD5628_2] = {
551 .shared_vref = true,
552 .internal_vref = 5000000,
553 .channels = ad5024_channels,
554 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100555 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100556 },
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200557 [ID_AD5629_1] = {
558 .shared_vref = true,
559 .internal_vref = 2500000,
560 .channels = ad5629_channels,
561 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100562 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200563 },
564 [ID_AD5629_2] = {
565 .shared_vref = true,
566 .internal_vref = 5000000,
567 .channels = ad5629_channels,
568 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100569 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200570 },
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100571 [ID_AD5645R_1V25] = {
572 .shared_vref = true,
573 .internal_vref = 1250000,
574 .channels = ad5645_channels,
575 .num_channels = 4,
576 .regmap_type = AD5064_REGMAP_ADI2
577 },
578 [ID_AD5645R_2V5] = {
579 .shared_vref = true,
580 .internal_vref = 2500000,
581 .channels = ad5645_channels,
582 .num_channels = 4,
583 .regmap_type = AD5064_REGMAP_ADI2
584 },
585 [ID_AD5647R_1V25] = {
586 .shared_vref = true,
587 .internal_vref = 1250000,
588 .channels = ad5645_channels,
589 .num_channels = 2,
590 .regmap_type = AD5064_REGMAP_ADI2
591 },
592 [ID_AD5647R_2V5] = {
593 .shared_vref = true,
594 .internal_vref = 2500000,
595 .channels = ad5645_channels,
596 .num_channels = 2,
597 .regmap_type = AD5064_REGMAP_ADI2
598 },
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100599 [ID_AD5648_1] = {
600 .shared_vref = true,
601 .internal_vref = 2500000,
602 .channels = ad5044_channels,
603 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100604 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100605 },
606 [ID_AD5648_2] = {
607 .shared_vref = true,
608 .internal_vref = 5000000,
609 .channels = ad5044_channels,
610 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100611 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100612 },
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100613 [ID_AD5665] = {
614 .shared_vref = true,
615 .channels = ad5669_channels,
616 .num_channels = 4,
617 .regmap_type = AD5064_REGMAP_ADI2
618 },
619 [ID_AD5665R_1V25] = {
620 .shared_vref = true,
621 .internal_vref = 1250000,
622 .channels = ad5669_channels,
623 .num_channels = 4,
624 .regmap_type = AD5064_REGMAP_ADI2
625 },
626 [ID_AD5665R_2V5] = {
627 .shared_vref = true,
628 .internal_vref = 2500000,
629 .channels = ad5669_channels,
630 .num_channels = 4,
631 .regmap_type = AD5064_REGMAP_ADI2
632 },
Lars-Peter Clausen64f4eaa2012-02-21 18:38:17 +0100633 [ID_AD5666_1] = {
634 .shared_vref = true,
635 .internal_vref = 2500000,
636 .channels = ad5064_channels,
637 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100638 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen64f4eaa2012-02-21 18:38:17 +0100639 },
640 [ID_AD5666_2] = {
641 .shared_vref = true,
642 .internal_vref = 5000000,
643 .channels = ad5064_channels,
644 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100645 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen64f4eaa2012-02-21 18:38:17 +0100646 },
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100647 [ID_AD5667] = {
648 .shared_vref = true,
649 .channels = ad5669_channels,
650 .num_channels = 2,
651 .regmap_type = AD5064_REGMAP_ADI2
652 },
653 [ID_AD5667R_1V25] = {
654 .shared_vref = true,
655 .internal_vref = 1250000,
656 .channels = ad5669_channels,
657 .num_channels = 2,
658 .regmap_type = AD5064_REGMAP_ADI2
659 },
660 [ID_AD5667R_2V5] = {
661 .shared_vref = true,
662 .internal_vref = 2500000,
663 .channels = ad5669_channels,
664 .num_channels = 2,
665 .regmap_type = AD5064_REGMAP_ADI2
666 },
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100667 [ID_AD5668_1] = {
668 .shared_vref = true,
669 .internal_vref = 2500000,
670 .channels = ad5064_channels,
671 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100672 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100673 },
674 [ID_AD5668_2] = {
675 .shared_vref = true,
676 .internal_vref = 5000000,
677 .channels = ad5064_channels,
678 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100679 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100680 },
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200681 [ID_AD5669_1] = {
682 .shared_vref = true,
683 .internal_vref = 2500000,
684 .channels = ad5669_channels,
685 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100686 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200687 },
688 [ID_AD5669_2] = {
689 .shared_vref = true,
690 .internal_vref = 5000000,
691 .channels = ad5669_channels,
692 .num_channels = 8,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100693 .regmap_type = AD5064_REGMAP_ADI,
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +0200694 },
Marc Andre8d144c92016-02-08 18:01:47 +0100695 [ID_LTC2606] = {
696 .shared_vref = true,
697 .internal_vref = 0,
698 .channels = ltc2607_channels,
699 .num_channels = 1,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100700 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100701 },
702 [ID_LTC2607] = {
703 .shared_vref = true,
704 .internal_vref = 0,
705 .channels = ltc2607_channels,
706 .num_channels = 2,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100707 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100708 },
709 [ID_LTC2609] = {
710 .shared_vref = false,
711 .internal_vref = 0,
712 .channels = ltc2607_channels,
713 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100714 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100715 },
716 [ID_LTC2616] = {
717 .shared_vref = true,
718 .internal_vref = 0,
719 .channels = ltc2617_channels,
720 .num_channels = 1,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100721 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100722 },
723 [ID_LTC2617] = {
724 .shared_vref = true,
725 .internal_vref = 0,
726 .channels = ltc2617_channels,
727 .num_channels = 2,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100728 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100729 },
730 [ID_LTC2619] = {
731 .shared_vref = false,
732 .internal_vref = 0,
733 .channels = ltc2617_channels,
734 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100735 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100736 },
737 [ID_LTC2626] = {
738 .shared_vref = true,
739 .internal_vref = 0,
740 .channels = ltc2627_channels,
741 .num_channels = 1,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100742 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100743 },
744 [ID_LTC2627] = {
745 .shared_vref = true,
746 .internal_vref = 0,
747 .channels = ltc2627_channels,
748 .num_channels = 2,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100749 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100750 },
751 [ID_LTC2629] = {
752 .shared_vref = false,
753 .internal_vref = 0,
754 .channels = ltc2627_channels,
755 .num_channels = 4,
Lars-Peter Clausen4946ff52016-02-08 18:01:49 +0100756 .regmap_type = AD5064_REGMAP_LTC,
Marc Andre8d144c92016-02-08 18:01:47 +0100757 },
Mike Looijmansb2d2d2b2017-05-08 09:26:24 +0200758 [ID_LTC2631_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 1),
759 [ID_LTC2631_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 1),
760 [ID_LTC2631_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 1),
761 [ID_LTC2631_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 1),
762 [ID_LTC2631_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 1),
763 [ID_LTC2631_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 1),
764 [ID_LTC2633_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 2),
765 [ID_LTC2633_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 2),
766 [ID_LTC2633_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 2),
767 [ID_LTC2633_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 2),
768 [ID_LTC2633_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 2),
769 [ID_LTC2633_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 2),
770 [ID_LTC2635_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 4),
771 [ID_LTC2635_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 4),
772 [ID_LTC2635_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 4),
773 [ID_LTC2635_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 4),
774 [ID_LTC2635_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 4),
775 [ID_LTC2635_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 4),
Lars-Peter Clausen1d0d8792012-02-21 18:38:13 +0100776};
777
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200778static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
779{
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100780 return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200781}
782
783static const char * const ad5064_vref_names[] = {
784 "vrefA",
785 "vrefB",
786 "vrefC",
787 "vrefD",
788};
789
790static const char * const ad5064_vref_name(struct ad5064_state *st,
791 unsigned int vref)
792{
793 return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
794}
795
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100796static int ad5064_set_config(struct ad5064_state *st, unsigned int val)
797{
798 unsigned int cmd;
799
800 switch (st->chip_info->regmap_type) {
801 case AD5064_REGMAP_ADI2:
802 cmd = AD5064_CMD_CONFIG_V2;
803 break;
804 default:
805 cmd = AD5064_CMD_CONFIG;
806 break;
807 }
808
809 return ad5064_write(st, cmd, 0, val, 0);
810}
811
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800812static int ad5064_probe(struct device *dev, enum ad5064_type type,
813 const char *name, ad5064_write_func write)
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200814{
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200815 struct iio_dev *indio_dev;
816 struct ad5064_state *st;
Lars-Peter Clausenf77ae9d2013-03-01 13:07:00 +0000817 unsigned int midscale;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200818 unsigned int i;
819 int ret;
820
Sachin Kamatc3679822013-08-19 12:38:00 +0100821 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200822 if (indio_dev == NULL)
823 return -ENOMEM;
824
825 st = iio_priv(indio_dev);
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200826 dev_set_drvdata(dev, indio_dev);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200827
828 st->chip_info = &ad5064_chip_info_tbl[type];
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200829 st->dev = dev;
830 st->write = write;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200831
832 for (i = 0; i < ad5064_num_vref(st); ++i)
833 st->vref_reg[i].supply = ad5064_vref_name(st, i);
834
Sachin Kamatc3679822013-08-19 12:38:00 +0100835 ret = devm_regulator_bulk_get(dev, ad5064_num_vref(st),
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200836 st->vref_reg);
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100837 if (ret) {
838 if (!st->chip_info->internal_vref)
Sachin Kamatc3679822013-08-19 12:38:00 +0100839 return ret;
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100840 st->use_internal_vref = true;
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100841 ret = ad5064_set_config(st, AD5064_CONFIG_INT_VREF_ENABLE);
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100842 if (ret) {
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200843 dev_err(dev, "Failed to enable internal vref: %d\n",
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100844 ret);
Sachin Kamatc3679822013-08-19 12:38:00 +0100845 return ret;
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100846 }
847 } else {
848 ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
849 if (ret)
Sachin Kamatc3679822013-08-19 12:38:00 +0100850 return ret;
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100851 }
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200852
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200853 indio_dev->dev.parent = dev;
854 indio_dev->name = name;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200855 indio_dev->info = &ad5064_info;
856 indio_dev->modes = INDIO_DIRECT_MODE;
Lars-Peter Clausen83c169d2012-02-21 18:38:14 +0100857 indio_dev->channels = st->chip_info->channels;
858 indio_dev->num_channels = st->chip_info->num_channels;
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200859
Lars-Peter Clausenf77ae9d2013-03-01 13:07:00 +0000860 midscale = (1 << indio_dev->channels[0].scan_type.realbits) / 2;
861
862 for (i = 0; i < st->chip_info->num_channels; ++i) {
863 st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
864 st->dac_cache[i] = midscale;
865 }
866
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200867 ret = iio_device_register(indio_dev);
868 if (ret)
869 goto error_disable_reg;
870
871 return 0;
872
873error_disable_reg:
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100874 if (!st->use_internal_vref)
875 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200876
877 return ret;
878}
879
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800880static int ad5064_remove(struct device *dev)
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200881{
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200882 struct iio_dev *indio_dev = dev_get_drvdata(dev);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200883 struct ad5064_state *st = iio_priv(indio_dev);
884
885 iio_device_unregister(indio_dev);
886
Sachin Kamatc3679822013-08-19 12:38:00 +0100887 if (!st->use_internal_vref)
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100888 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200889
890 return 0;
891}
892
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200893#if IS_ENABLED(CONFIG_SPI_MASTER)
894
Lars-Peter Clausen9660ac72012-07-11 09:01:00 +0100895static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
896 unsigned int addr, unsigned int val)
897{
898 struct spi_device *spi = to_spi_device(st->dev);
899
900 st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
901 return spi_write(spi, &st->data.spi, sizeof(st->data.spi));
902}
903
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800904static int ad5064_spi_probe(struct spi_device *spi)
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200905{
906 const struct spi_device_id *id = spi_get_device_id(spi);
907
908 return ad5064_probe(&spi->dev, id->driver_data, id->name,
909 ad5064_spi_write);
910}
911
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800912static int ad5064_spi_remove(struct spi_device *spi)
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200913{
914 return ad5064_remove(&spi->dev);
915}
916
917static const struct spi_device_id ad5064_spi_ids[] = {
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200918 {"ad5024", ID_AD5024},
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100919 {"ad5025", ID_AD5025},
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200920 {"ad5044", ID_AD5044},
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100921 {"ad5045", ID_AD5045},
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200922 {"ad5064", ID_AD5064},
923 {"ad5064-1", ID_AD5064_1},
Lars-Peter Clausenf8be4af2012-02-21 18:38:15 +0100924 {"ad5065", ID_AD5065},
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100925 {"ad5628-1", ID_AD5628_1},
926 {"ad5628-2", ID_AD5628_2},
927 {"ad5648-1", ID_AD5648_1},
928 {"ad5648-2", ID_AD5648_2},
Lars-Peter Clausen64f4eaa2012-02-21 18:38:17 +0100929 {"ad5666-1", ID_AD5666_1},
930 {"ad5666-2", ID_AD5666_2},
Lars-Peter Clausenbb92ff32012-02-21 18:38:16 +0100931 {"ad5668-1", ID_AD5668_1},
932 {"ad5668-2", ID_AD5668_2},
933 {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200934 {}
935};
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200936MODULE_DEVICE_TABLE(spi, ad5064_spi_ids);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200937
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200938static struct spi_driver ad5064_spi_driver = {
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200939 .driver = {
940 .name = "ad5064",
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200941 },
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200942 .probe = ad5064_spi_probe,
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800943 .remove = ad5064_spi_remove,
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200944 .id_table = ad5064_spi_ids,
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +0200945};
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200946
947static int __init ad5064_spi_register_driver(void)
948{
949 return spi_register_driver(&ad5064_spi_driver);
950}
951
Gerard Snitselaar21fa54e2012-07-11 05:05:00 +0100952static void ad5064_spi_unregister_driver(void)
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200953{
954 spi_unregister_driver(&ad5064_spi_driver);
955}
956
957#else
958
959static inline int ad5064_spi_register_driver(void) { return 0; }
960static inline void ad5064_spi_unregister_driver(void) { }
961
962#endif
963
964#if IS_ENABLED(CONFIG_I2C)
965
Lars-Peter Clausen9660ac72012-07-11 09:01:00 +0100966static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
967 unsigned int addr, unsigned int val)
968{
969 struct i2c_client *i2c = to_i2c_client(st->dev);
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100970 unsigned int cmd_shift;
Michael Hennerich03fe472e2015-10-13 18:15:37 +0200971 int ret;
Lars-Peter Clausen9660ac72012-07-11 09:01:00 +0100972
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +0100973 switch (st->chip_info->regmap_type) {
974 case AD5064_REGMAP_ADI2:
975 cmd_shift = 3;
976 break;
977 default:
978 cmd_shift = 4;
979 break;
980 }
981
982 st->data.i2c[0] = (cmd << cmd_shift) | addr;
Lars-Peter Clausen9660ac72012-07-11 09:01:00 +0100983 put_unaligned_be16(val, &st->data.i2c[1]);
Michael Hennerich03fe472e2015-10-13 18:15:37 +0200984
985 ret = i2c_master_send(i2c, st->data.i2c, 3);
986 if (ret < 0)
987 return ret;
988
989 return 0;
Lars-Peter Clausen9660ac72012-07-11 09:01:00 +0100990}
991
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800992static int ad5064_i2c_probe(struct i2c_client *i2c,
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +0200993 const struct i2c_device_id *id)
994{
995 return ad5064_probe(&i2c->dev, id->driver_data, id->name,
996 ad5064_i2c_write);
997}
998
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -0800999static int ad5064_i2c_remove(struct i2c_client *i2c)
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +02001000{
1001 return ad5064_remove(&i2c->dev);
1002}
1003
1004static const struct i2c_device_id ad5064_i2c_ids[] = {
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +01001005 {"ad5625", ID_AD5625 },
1006 {"ad5625r-1v25", ID_AD5625R_1V25 },
1007 {"ad5625r-2v5", ID_AD5625R_2V5 },
1008 {"ad5627", ID_AD5627 },
1009 {"ad5627r-1v25", ID_AD5627R_1V25 },
1010 {"ad5627r-2v5", ID_AD5627R_2V5 },
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +02001011 {"ad5629-1", ID_AD5629_1},
1012 {"ad5629-2", ID_AD5629_2},
1013 {"ad5629-3", ID_AD5629_2}, /* similar enough to ad5629-2 */
Lars-Peter Clausenf47732c2016-02-08 18:01:50 +01001014 {"ad5645r-1v25", ID_AD5645R_1V25 },
1015 {"ad5645r-2v5", ID_AD5645R_2V5 },
1016 {"ad5665", ID_AD5665 },
1017 {"ad5665r-1v25", ID_AD5665R_1V25 },
1018 {"ad5665r-2v5", ID_AD5665R_2V5 },
1019 {"ad5667", ID_AD5667 },
1020 {"ad5667r-1v25", ID_AD5667R_1V25 },
1021 {"ad5667r-2v5", ID_AD5667R_2V5 },
Lars-Peter Clausen5dcbe972015-10-13 18:15:38 +02001022 {"ad5669-1", ID_AD5669_1},
1023 {"ad5669-2", ID_AD5669_2},
1024 {"ad5669-3", ID_AD5669_2}, /* similar enough to ad5669-2 */
Marc Andre8d144c92016-02-08 18:01:47 +01001025 {"ltc2606", ID_LTC2606},
1026 {"ltc2607", ID_LTC2607},
1027 {"ltc2609", ID_LTC2609},
1028 {"ltc2616", ID_LTC2616},
1029 {"ltc2617", ID_LTC2617},
1030 {"ltc2619", ID_LTC2619},
1031 {"ltc2626", ID_LTC2626},
1032 {"ltc2627", ID_LTC2627},
1033 {"ltc2629", ID_LTC2629},
Mike Looijmansb2d2d2b2017-05-08 09:26:24 +02001034 {"ltc2631-l12", ID_LTC2631_L12},
1035 {"ltc2631-h12", ID_LTC2631_H12},
1036 {"ltc2631-l10", ID_LTC2631_L10},
1037 {"ltc2631-h10", ID_LTC2631_H10},
1038 {"ltc2631-l8", ID_LTC2631_L8},
1039 {"ltc2631-h8", ID_LTC2631_H8},
1040 {"ltc2633-l12", ID_LTC2633_L12},
1041 {"ltc2633-h12", ID_LTC2633_H12},
1042 {"ltc2633-l10", ID_LTC2633_L10},
1043 {"ltc2633-h10", ID_LTC2633_H10},
1044 {"ltc2633-l8", ID_LTC2633_L8},
1045 {"ltc2633-h8", ID_LTC2633_H8},
1046 {"ltc2635-l12", ID_LTC2635_L12},
1047 {"ltc2635-h12", ID_LTC2635_H12},
1048 {"ltc2635-l10", ID_LTC2635_L10},
1049 {"ltc2635-h10", ID_LTC2635_H10},
1050 {"ltc2635-l8", ID_LTC2635_L8},
1051 {"ltc2635-h8", ID_LTC2635_H8},
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +02001052 {}
1053};
1054MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
1055
1056static struct i2c_driver ad5064_i2c_driver = {
1057 .driver = {
1058 .name = "ad5064",
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +02001059 },
1060 .probe = ad5064_i2c_probe,
Greg Kroah-Hartmanfc526922012-12-21 13:21:43 -08001061 .remove = ad5064_i2c_remove,
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +02001062 .id_table = ad5064_i2c_ids,
1063};
1064
1065static int __init ad5064_i2c_register_driver(void)
1066{
1067 return i2c_add_driver(&ad5064_i2c_driver);
1068}
1069
1070static void __exit ad5064_i2c_unregister_driver(void)
1071{
1072 i2c_del_driver(&ad5064_i2c_driver);
1073}
1074
1075#else
1076
1077static inline int ad5064_i2c_register_driver(void) { return 0; }
1078static inline void ad5064_i2c_unregister_driver(void) { }
1079
1080#endif
1081
1082static int __init ad5064_init(void)
1083{
1084 int ret;
1085
1086 ret = ad5064_spi_register_driver();
1087 if (ret)
1088 return ret;
1089
1090 ret = ad5064_i2c_register_driver();
1091 if (ret) {
1092 ad5064_spi_unregister_driver();
1093 return ret;
1094 }
1095
1096 return 0;
1097}
1098module_init(ad5064_init);
1099
1100static void __exit ad5064_exit(void)
1101{
1102 ad5064_i2c_unregister_driver();
1103 ad5064_spi_unregister_driver();
1104}
1105module_exit(ad5064_exit);
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +02001106
1107MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
Lars-Peter Clausen6a17a072012-06-26 11:04:36 +02001108MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs");
Lars-Peter Clausenfcf265d2011-10-18 09:33:03 +02001109MODULE_LICENSE("GPL v2");